AD9577BCPZ-R7 Analog Devices Inc, AD9577BCPZ-R7 Datasheet - Page 17

• Manufacturer Part Number: AD9577BCPZ-R7
• Manufacturer: Analog Devices Inc

Specifications of AD9577BCPZ-R7

• Lead Free Status / Rohs Status: Compliant

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 15. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7, 8
9
10
11
12
13
14
15, 16, 35, 36
17
18
19
20
21
22
23
24
25
26
27
28
29
Mnemonic
VSCA
VSI2C
REFOUT
VSREFOUT
VSX
REFCLK
XT2, XT1
REFSEL
VSCB
TST1B
TST2B
LDO
VSVB
GND
OUT2N
OUT2P
VSOB2B
MARGIN
VSOB3B
OUT3N
OUT3P
VSFB
VSM
SSCG
VSFA
OUT1N
OUT1P
Description
PLL1 Power Supply.
I
CMOS Reference Output.
Reference Output Buffer Power Supply.
Crystal Oscillator and Input Reference Power Supply.
Reference Clock Input. Tie low when not in use.
External 19.44 MHz to 27 MHz Crystal. Leave unconnected when not in use.
Logic Input. Use this pin to select the reference source. Internal 30 kΩ pull-up resistor.
PLL2 Analog Power Supply.
Test Pin. Connect this pin to Pin 13 (LDO).
Test Pin. Connect this pin to Pin 13 (LDO).
This pin is for bypassing the PLL2 LDO to ground with a 220 nF capacitor.
PLL2 VCO Power Supply.
Ground.
LVPECL/LVDS/CMOS Clock Output.
LVPECL/LVDS/CMOS Clock Output.
Output Port OUT2 Power Supply.
Logic 1 sets the margining frequency on the clock output pins. Internal 30 kΩ pull-down resistor.
Output Port OUT3 Power Supply.
LVPECL/LVDS/CMOS Clock Output.
LVPECL/LVDS/CMOS Clock Output.
PLL2 Analog Power Supply.
PLL2 Digital Power Supply.
Logic 1 enables spread spectrum operation of PLL2. Internal 30 kΩ pull-down resistor.
PLL1 Analog Power Supply.
LVPECL/LVDS/CMOS Clock Output.
LVPECL/LVDS/CMOS Clock Output.
NOTES
1. THE EXPOSED PADDLE ON THIS PACKAGE IS AN ELECTRICAL CONNECTION
2
C Digital Power Supply.
AS WELL AS A THERMAL ENHANCEMENT. FOR THE DEVICE TO FUNCTION
PROPERLY, THE PADDLE MUST BE ATTACHED TO GROUND (GND). IT IS
RECOMMENDED THAT A MINIMUM OF NINE VIAS BE USED TO CONNECT THE
PADDLE TO THE PRINTED CIRCUIT BOARD (PCB) GROUND PLANE.
VSREFOUT
REFOUT
REFCLK
REFSEL
VSI2C
VSCA
VSCB
VSX
XT2
XT1
10
1
2
3
4
5
6
7
8
9
Figure 5. Pin Configuration
PIN 1
INDICATOR
Rev. 0 | Page 17 of 44
(Not to Scale)
AD9577
TOP VIEW
30 VSOB1A
29 OUT1P
28 OUT1N
27 VSFA
26 SSCG
25 VSM
24 VSFB
23 OUT3P
22 OUT3N
21 VSOB3B
AD9577