SAM7X128 Atmel Corporation, SAM7X128 Datasheet - Page 288

• Manufacturer Part Number: SAM7X128
• Manufacturer: Atmel Corporation

Specifications of SAM7X128

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

29.5.6
288
SAM7X512/256/128
Read/Write Flowcharts
The following flowcharts shown in
page
give examples for read and write operations. A polling or interrupt method can be used to check
the status bits. The interrupt method requires that the interrupt enable register (TWI_IER) be
configured first.
Figure 29-13. TWI Write Operation with Single Data Byte without Internal Address
290,
Figure 29-16 on page
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Device slave address (DADR)
Set the Master Mode register:
291,
Write ==> bit MREAD = 0
TWI_THR = Data to send
Set the Control register:
Load Transmit register
- Transfer direction bit
Read Status register
Read Status register
Figure
(Needed only once)
TWI_CR = MSEN
Transfer finished
- Master enable
TXCOMP = 1?
Set TWI clock
Figure 29-17 on page 292
TXRDY = 1?
Yes
Yes
BEGIN
29-13,
Figure 29-14 on page
No
No
and
Figure 29-18 on page 293
289,
6120I–ATARM–06-Apr-11
Figure 29-15 on