SAM7X128 Atmel Corporation, SAM7X128 Datasheet - Page 499

• Manufacturer Part Number: SAM7X128
• Manufacturer: Atmel Corporation

Specifications of SAM7X128

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

35.6.7
Register Name:
Access Type:
• LDATA: Last Data Converted
The analog-to-digital conversion data is placed into this register at the end of a conversion and remains until a new conver-
sion is completed.
35.6.8
Register Name:
Access Type:
• EOCx: End of Conversion Interrupt Enable x
• OVREx: Overrun Error Interrupt Enable x
• DRDY: Data Ready Interrupt Enable
• GOVRE: General Overrun Error Interrupt Enable
• ENDRX: End of Receive Buffer Interrupt Enable
• RXBUFF: Receive Buffer Full Interrupt Enable
0 = No effect.
1 = Enables the corresponding interrupt.
6120I–ATARM–06-Apr-11
OVRE7
EOC7
31
23
15
31
23
15
–
–
–
7
–
–
7
ADC Last Converted Data Register
ADC Interrupt Enable Register
OVRE6
EOC6
30
22
14
30
22
14
ADC_LCDR
Read-only
–
–
–
6
ADC_IER
Write-only
–
–
6
OVRE5
EOC5
29
21
13
29
21
13
–
–
–
5
–
–
5
OVRE4
EOC4
28
20
12
28
20
12
–
–
–
4
–
–
4
LDATA
RXBUFF
OVRE3
EOC3
27
19
11
27
19
11
–
–
–
3
–
3
ENDRX
OVRE2
EOC2
26
18
10
26
18
10
–
–
–
2
–
2
SAM7X512/256/128
GOVRE
OVRE1
EOC1
25
17
25
17
–
–
9
1
–
9
1
LDATA
OVRE0
DRDY
EOC0
24
16
24
16
–
–
8
0
–
8
0
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