SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 1053

• Manufacturer Part Number: SAM3X8C
• Manufacturer: Atmel Corporation

38.7.34
Name:
Address:
Access:
This register acts as a double buffer for the CV and CVM values. This prevents an unexpected comparison x match.
Only the first 16 bits (channel counter size) of field CV
• CVUPD: Comparison x Value Update
Define the comparison x value to be compared with the counter of the channel 0.
• CVMUPD: Comparison x Value Mode Update
0 = The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is
incrementing.
1 = The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is
decrementing.
Note:
CAUTION: to be taken into account, the write of the register PWM_CMPVUPDx must be followed by a write of the register
PWM_CMPMUPDx.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
–
7
This bit is useless if the counter of the channel 0 is left aligned (CALG = 0 in
PWM Comparison x Value Update Register
PWM_CMPVUPDx
0x40094134 [0], 0x40094144 [1], 0x40094154 [2], 0x40094164 [3], 0x40094174 [4], 0x40094184 [5],
0x40094194 [6], 0x400941A4 [7]
Write-only
30
22
14
–
6
29
21
13
–
5
28
20
12
–
4
UPD
CVUPD
CVUPD
CVUPD
are significant.
27
19
11
–
3
“PWM Channel Mode Register” on page
26
18
10
–
2
25
17
–
9
1
SAM3X/A
SAM3X/A
CVMUPD
24
16
1056)
8
0
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