SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 461

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SAM3X8C

Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
Datasheets
26.15.2
Figure 26-29. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
internal signal from PMC
Switching from (to) Slow Clock Mode to (from) Normal Mode
Slow Clock Mode
NBS0, NBS1,
A0, A1
This write cycle finishes with the slow clock mode set
A [23:2]
NWE
MCK
NCS
of parameters after the clock rate transition
When switching from slow clock mode to normal mode, the current slow clock mode transfer is
completed at high clock rate, with the set of slow clock mode parameters. See
external device may not be fast enough to support such timings.
Figure 26-30
other.
SLOW CLOCK MODE WRITE
1
NWE_CYCLE = 3
illustrates the recommended procedure to properly switch from one mode to the
1
1
SLOW CLOCK MODE WRITE
1
1
Slow clock mode transition is detected:
1
Reload Configuration Wait State
2
NORMAL MODE WRITE
NWE_CYCLE = 7
3
2
SAM3X/A
SAM3X/A
Figure
26-29. The
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