SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 996

• Manufacturer Part Number: SAM3X8C
• Manufacturer: Atmel Corporation

996
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SAM3X/A
SAM3X/A
current level of the fault inputs by means of the field FIV, and can know which fault is currently
active thanks to the FS field.
Each fault can be taken into account or not by the fault protection mechanism in each channel.
To be taken into account in the channel x, the fault y must be enabled by the bit FPEx[y] in the
“PWM Fault Protection Enable Registers” (PWM_FPE1/2). However the synchronous channels
(see
of the channel 0 (bits FPE0[y]).
The fault protection on a channel is triggered when this channel is enabled and when any one of
the faults that are enabled for this channel is active. It can be triggered even if the PWM master
clock (MCK) is not running but only by a fault input that is not glitch filtered.
When the fault protection is triggered on a channel, the fault protection mechanism forces the
channel outputs to the values defined by the fields FPVHx and FPVLx in the
tion Value Register”
forcing is made asynchronously to the channel counter.
CAUTION:
If a comparison unit is enabled (see
triggered in the channel 0, in this case the comparison cannot match.
As soon as the fault protection is triggered on a channel, an interrupt (different from the interrupt
generated at the end of the PWM period) can be generated but only if it is enabled and not
masked. The interrupt is reset by reading the interrupt status register, even if the fault which has
caused the trigger of the fault protection is kept active.
• To prevent an unexpected activation of the status flag FSy in the PWM_FSR register, the
• To prevent an unexpected activation of the Fault Protection on the channel x, the bit FPEx[y]
FMODy bit can be set to “1” only if the FPOLy bit has been previously configured to its final
value.
can be set to “1” only if the FPOLy bit has been previously configured to its final value.
Section 38.6.2.7 “Synchronous
(PWM_FPV) and leads to a reset of the counter of this channel. The output
Channels”) do not use their own fault enable bits, but those
Section 38.6.3 “PWM Comparison
Units”) and if a fault is
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
“PWM Fault Protec-