SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 1348

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SAM3X8C

Manufacturer Part Number
SAM3X8C
Description
Manufacturer
Atmel Corporation
Datasheets
43.7.5
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CHx: Channel x Enable
0 = No effect.
1 = Enables the corresponding channel.
Note: if USEQ = 1 in ADC_MR register, CHx corresponds to the xth channel of the sequence described in ADC_SEQR1
and ADC_SEQR2.
1348
1348
CH15
CH7
31
23
15
7
SAM3X/A
SAM3X/A
ADC Channel Enable Register
ADC_CHER
0x400C0010
Write-only
CH14
CH6
30
22
14
6
CH13
CH5
29
21
13
5
CH12
CH4
28
20
12
4
“ADC Write Protect Mode Register” on page
CH11
CH3
27
19
11
3
CH10
CH2
26
18
10
2
CH9
CH1
25
17
9
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
1363.
CH8
CH0
24
16
8
0

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