XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 10

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

Functional Description: Rocket I/O Multi-Gigabit Transceiver (MGT)
Table 1: Standards Supported by the Rocket I/O MGT
The serial bit rate need not be configured in the transceiver,
as the operating frequency is implied by the received data
and reference clock applied.
10
Infiniband
Aurora (Xilinx)
Custom mode
Mode
1, 2, 3, 4, ...
1, 2, 3, 4, ...
Channels
(Lanes)
1, 4, 12
0.840 - 3.125
up to 3.125
Baud Rate
(Gb/s)
2.5
I/O
Rate (REFCLK)
Internal Clock
42.00-156.25
up to 156.25
(MHz)
125
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The Rocket I/O transceiver core consists of the Physical
Media Attachment (PMA) and Physical Coding Sublayer
(PCS). The PMA contains the serializer and deserializer.
The PCS contains the bypassable 8B/10B encoder/
decoder, elastic buffers, and Cyclic Redundancy Check
(CRC) units. The encoder and decoder handle the 8B/10B
coding scheme. The elastic buffers support the clock cor-
rection (rate matching) and channel bonding features. The
CRC units perform CRC generation and checking.
Figure 2
FPGA interface signals.
shows the Rocket I/O high-level block diagram and
DS083-2 (v1.0) January 31, 2002
Advance Product Specification
R