XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 93

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

DS083-4 (v1.0) January 31, 2002
This document provides
Combinations and Maximum I/Os
Definitions, followed by pinout tables for the following pack-
ages:
•
•
Virtex-II Pro Device/Package Combinations and Maximum I/Os
Wire-bond and flip-chip packages are available.
Table 2
wire-bond and flip-chip packages, respectively.
•
•
•
Table 2: Flip-Chip Packages Information
Table 3
Virtex-II Pro device/package combination. The number of I/Os per package includes all user I/Os except the fifteen control
pins (CCLK, DONE, M0, M1, M2, PROG_B, PWRDWN_B, TCK, TDI, TDO, TMS, HSWAP_EN, DXN, DXP, AND RSVD) and
the nine (per transceiver) Rocket I/O MGT pins (TXP, TXN, RXP, RXN, AVCCAUXTX, AVCCAUXRX, VTTX, VTRX, and
GNDA). The number of transceivers in the device is the number of Rocket I/O MGT pins in
Table 3: Virtex-II Pro Available I/Os and Rocket I/O MGT Pins per Device/Package Combination
DS083-4 (v1.0) January 31, 2002
Advance Product Specification
Package
Pitch (mm)
Size (mm)
I/Os
FF1152
FF1517
FG256 Fine-Pitch BGA Package
FG456 Fine-Pitch BGA Package
FG denotes wire-bond fine-pitch BGA (1.00 mm pitch).
FF denotes flip-chip fine-pitch BGA (1.00 mm pitch).
BF denotes flip-chip BGA (1.27 mm pitch).
FG256
FG456
FF672
FF896
BF957
Package
Device
© 2002 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
show the maximum number of user I/Os possible in
shows the number of available I/Os and the number of Rocket I/O™ multi-gigabit transceiver (MGT) pins for each
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
User I/Os
Available
140
156
204
XC2VP2
27 x 27
FF672
1.00
396
Rocket I/O
MGT Pins
Virtex-II Pro Device/Package
R
36
72
72
and
User I/Os
Available
140
248
348
Virtex-II Pro Pin
XC2VP4
31 x 31
FF896
1.00
556
Table 1
Rocket I/O
MGT Pins
36
72
72
0
0
www.xilinx.com
1-800-255-7778
and
0
Available
User I/Os
248
396
396
Virtex-II Pro™ Platform FPGAs:
Pinout Information
Advance Product Specification
•
•
•
•
•
Table 1: Wire-Bond Packages Information
Pitch (mm)
Size (mm)
I/Os
XC2VP7
FF1152
35 x 35
FF672 Flip-Chip Fine-Pitch BGA Package
FF896 Flip-Chip Fine-Pitch BGA Package
FF1152 Flip-Chip Fine-Pitch BGA Package
FF1517 Flip-Chip Fine-Pitch BGA Package
BF957 Flip-Chip BGA Package
1.00
692
Rocket I/O
MGT Pins
Package
72
72
72
Available
User I/Os
556
564
564
XC2VP20
FF1517
40 x 40
1.00
852
Table 3
Rocket I/O
MGT Pins
17 x 17
FG256
1.00
140
144
108
72
divided by nine.
Available
User I/Os
692
852
584
XC2VP50
40 x 40
BF957
23 x 23
1.27
FG456
584
Module 4 of 4
1.00
248
Rocket I/O
MGT Pins
144
144
108
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