saa7803 NXP Semiconductors, saa7803 Datasheet - Page 10

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saa7803

Manufacturer Part Number
saa7803
Description
Saa7803 One Chip Cd Audio Device
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
9397 750 13695
Objective data sheet
Fig 5. Analog clock generation
OSCOUT
OSCIN
6.2 Analog clock generation
94
93
pad_clk
The four diode signals D1, D2, D3 and D4 are summed in the first RF amplifier. The gain
of the first amplifier is controlled by G1FIXED[3:0] (FIXED = static), register AGCGain, bits
7:4.
A second gain stage has been added to lessen the gain bandwidth requirements of a
single gain stage operational amplifier and also to act with the dynamic Automatic Gain
Control (AGC). The gain of this amplifier is set with G2DYN[3:0] (DYN = dynamic) register
AGCGain, bits 3:0 and can be changed on the fly from the ARM microprocessor. The gain
range was chosen to accommodate 12 dB of gain needed to boost the signal as the laser
tracks across a finger print defect on the disc.
CD-R, CD-RW and finger prints not only reduces the AC signal amplitude compared to a
perfect pressed disk, but also reduces the DC pedestal voltage. The high-pass filter will
remove all DC present at the input but offsets would be added by the second and third
gain stages.
A 5-bit plus sign DAC controlled by register OffsetComp, bits 5:0,
OFFSETCOMPVALUE[5:0] adds a current to compensate for this offset. The amount of
current will reduce in linear dB states and will track the AC gain.
To help users of the IC setup the correct gain and DC offset for each particular
mechanism, an eye pattern monitor facility has been included. This consists of a high
frequency buffer amplifier whose input can be selected to monitor various important nodes
within the analog RF path. The monitor point is controlled by register RFControl1, bits 6:4
RFMONSEL. The output of the buffer drives pin HF_MON (pin 80).
This register also controls the roll-off frequency of the noise filter which precedes the 6-bit
ADC in the RF path.
Various blocks within the analog RF path can be powered down if required, including the
complete path. These power-down bits are controlled by register RFControl2, bits 5:0.
In addition, the 6-bit RF ADC can be tested stand alone in application mode or a separate
external RF path IC can be connected to SAA7803 by selecting bit 1 of register
‘RFBypassSel’. The input for the RF signal is then through pin HF_MON. In this mode the
center diode summing circuit, RF amp1, high-pass filter and RF amp2 are all bypassed.
DIVIDE
MUX
BY 2
Rev. 01 — 19 April 2005
MUX
MULTIPLIER
8
AUDIO
MUX
DAC
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
ADC
HF
One chip CD audio device
pad_clk1v8
sys_clk
sysclk_premux
adac_out_4_clk
SAA7803
001aab749
10 of 74

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