lf3320 LOGIC Devices Incorporated, lf3320 Datasheet - Page 13

• Manufacturer Part Number: lf3320
• Description: Horizontal Digital Image Filter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
RIN
path. When not cascading, Bit 0 of
Configuration Register 5 should be set
to a “0”.
Special data routing circuitry is used
to feed the COUT and ROUT output
registers. The data routing circuitry
is required to correctly align data in
the forward and reverse data paths
as data passes from one LF3320 to
another.
The COUT and ROUT registers are
loaded with data which is two clock
cycles behind the current output of
the I/D Register just before the ROUT
or COUT register. This correctly
accounts for the extra delays added to
the forward and reverse data paths by
F
IGURE
FILTER B RSL
11-0
to feed data to the reverse data
16. F
RSLB
4
3-0
ILTER
32
32
5
A
DATA OUT
AND
DATA IN
SELECT
32
32
16
16
LIMIT
RND
B R
OUND
the input/output cascade registers.
Output Adder
The Output Adder adds the Filter
A and B outputs together when the
device is in Single Filter Mode. If
24-bit data and 12-bit coefficients or
12-bit data and 24-bit coefficients are
desired, the LF3320 can facilitate this
by scaling the Filter B output by 2
before adding it to the Filter A output.
Bit 3 in Configuration Register 5 deter-
mines if the Filter B output is scaled
before being added to the Filter A
output.
Rounding
/S
ELECT
DATA OUT
DATA IN
SELECT
32
32
16
16
LIMIT
RND
/L
IMIT
32
32
5
C
2-13
IRCUITRY
RSLA
4
FILTER A RSL
3-0
-12
Horizontal Digital Image Filter
The overall filter output (Single Filter
Mode) or Filter A and B outputs
(Dual Filter Mode) may be rounded
by adding the contents of one of the
sixteen Filter A or B round registers to
the overall filter, Filter A, or Filter B
outputs (see Figure 10). The Filter A
round registers are used for the
overall filter (Single Filter Mode) or
Filter A (Dual Filter Mode). The
Filter B round registers are used for
Filter B (Dual Filter Mode). Each
round register is 32-bits wide and
user-programmable. This allows the
filter’s output to be rounded to any
precision required. Since any 32-bit
value may be programmed into the
round registers, the device can sup-
port complex rounding algorithms as
well as standard Half-LSB rounding.
RSLA
teen Filter A round registers are used
in the
RSLB
teen Filter B round registers are used
in the Filter B rounding circuitry. A
value of 0 on RSLA/RSLB
Filter A/B round register 0. A value
of 1 selects Filter A/B round register
1 and so on. RSLA/RSLB
changed every clock cycle if desired.
This allows the rounding algorithm to
be changed every clock cycle. This is
useful when filtering interleaved data.
If rounding is not desired, a round
register should be loaded with 0 and
selected as the register used for round-
ing. Round register loading is dis-
cussed in the LF Interface
Output Select
The word width of the overall filter,
Filter A, and Filter B outputs is
32-bits. However, only 16-bits may
be sent to DOUT
Dual Filter Modes) and COUT
ROUT
Filter A/B select circuitry determines
which 16-bits are passed (see Table 1).
The Filter A/B select registers control
the Filter A/B select circuitry. There
are sixteen Filter A and B select regis-
ters.
Video Imaging Products
3-0
3-0
3-0
Filter A rounding circuitry.
determines which of the six-
determines which of the six-
(Dual Filter Mode). The
15-0
(Single or
6/22/2007–LDS.3320-R
TM
3-0
3-0
LF3320
section.
may be
selects
11-0
/