lf3320 LOGIC Devices Incorporated, lf3320 Datasheet - Page 5

• Manufacturer Part Number: lf3320
• Description: Horizontal Digital Image Filter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
Cascade Output (COUT
Cascade Output (ROUT
B I/D Registers. When SHENB is
LOW, data is latched into the Cascade
Registers and shifted through the I/D
Registers on the rising edge of CLK.
When SHENB is HIGH, data can
not be loaded into the Cascade Reg-
isters or shifted through the I/D Reg-
isters and their contents will not be
changed.
In Single Filter Mode, SHENB also
enables or disables the loading of data
into the Input (DIN
cade Output (ROUT
A I/D Registers. It is important to
note that in Single Filter Mode, both
SHENA and SHENB should be con-
nected together. Both must be active
to enable data loading in Single Filter
Mode. SHENB is latched on the rising
edge of CLK.
RSLA
RSLA
sixteen user-programmable Round/
Select/Limit registers (RSL registers)
are used in the Filter A RSL circuitry.
A value of 0 on RSLA
register 0. A value of 1 selects RSL
register 1 and so on. RSLA
latched on the rising edge of CLK (see
the round, select, and limit sections for
a complete discussion).
RSLB
RSLB
teen user-programmable RSL registers
are used in the Filter B RSL circuitry.
A value of 0 on RSLB
register 0. A value of 1 selects RSL
register 1 and so on. RSLB
latched on the rising edge of CLK (see
the round, select, and limit sections for
a complete discussion).
OED — DOUT Output Enable
When OED is LOW, DOUT
enabled for output. When OED is
3-0
3-0
3-0
3-0
— Filter B Round/Select/Limit
determines which of the six-
— Filter A Round/Select/Limit
determines which of the
Control
Control
11-0
11-0
3-0
3-0
), Reverse Cas-
) and Filter
11-0
3-0
selects RSL
selects RSL
) and Filter
3-0
3-0
), Reverse
15-0
is
is
is
HIGH, DOUT
impedance state.
OEC — COUT/ROUT Output Enable
When OEC is LOW, COUT
ROUT
When OEC is HIGH, COUT
ROUT
ance state.
PAUSEA — LF Interface
When PAUSEA is HIGH, the Filter
F
F
ROUT
DIN
IGURE
IGURE
DIN
11-0
11-0
3-0
3-0
11-0
12
are enabled for output.
are placed in a high-imped-
4. S
5. D
12
12
15-0
INGLE
UAL
is placed in a high-
2-5
REGISTERS
DOUT
CIRCUIT
16
FILTER
REGISTERS
R.S.L.
F
I/D
A
FILTER
ILTER
F
15-0
I/D
TM
A
ILTER
Pause
11-0
11-0
M
M
ODE
and
and
ODE
Horizontal Digital Image Filter
DOUT
CIRCUIT
16
RSL
15-0
A LF Interface
halted until PAUSEA is returned to
a LOW state. This effectively allows
the user to load coefficients and con-
trol registers at a slower rate than the
master clock (see the LF Interface
section for a full discussion).
PAUSEB — LF Interface
When PAUSEB is HIGH, the Filter B
Video Imaging Products
ROUT
REGISTERS
CIRCUIT
16
3-0
FILTER
R.S.L.
REGISTERS
I/D
/ COUT
B
FILTER
I/D
B
TM
11-0
loading sequence is
TM
6/22/2007–LDS.3320-R
12
12
Pause
LF3320
12
RIN
COUT
RIN
11-0
TM
11-0
11-0