lf3320 LOGIC Devices Incorporated, lf3320 Datasheet - Page 17

• Manufacturer Part Number: lf3320
• Description: Horizontal Digital Image Filter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
lower limit and 72A4H is loaded as
the upper limit.
It takes 9S clock cycles to load S coef-
ficient sets into the device. Therefore,
it takes 2304 clock cycles to load all
256 coefficient sets. Assuming an 83
MHz clock rate, all 256 coefficient sets
can be updated in less than 27.7 µs,
which is well within vertical blanking
time. It takes 5S clock cycles to load
S round or limit registers. Therefore,
it takes 320 clock cycles to update all
round and limit registers (both Filters
A and B). Assuming an 83 MHz clock
rate, all Filter A and B round/limit
registers can be updated in 3.84 µs.
The coefficient banks and
Configuration/Control registers are
not loaded with data until all data
values for the specified address are
F
F
PAUSEA/PAUSEB
PAUSEA/PAUSEB
IGURE
IGURE
CFA/CFB
CFA/CFB
LDA/LDB
LDA/LDB
20. C
21. R
CLK
CLK
11-0
11-0
W1: Configuration Register loaded with new data on this rising clock edge.
W2: Select Register loaded with new data on this rising clock edge.
W1: Round Register loaded with new data on this rising clock edge.
ONFIGURATION AND
OUND
R
ADDR
ADDR
EGISTER
1
1
CONFIGURATION REGISTER
L
OADING
S
ELECT
loaded into the LF Interface
other words, the coefficient banks are
not written to until all eight coeffi-
cients have been loaded into the LF
Interface
written to until all four data values are
loaded.
After the last data value is loaded, the
interface will expect a new address
value on the next clock cycle. After
the next address value is loaded, data
loading will begin again as previously
discussed. As long as data is loaded
into the interface, LDA must remain
LOW. After all desired coefficient
banks and Configuration/Control reg-
isters are loaded with data, the LF
Interface
done by setting LDA HIGH on the
clock cycle after the clock cycle which
latches the last data value. It is impor-
DATA
S
R
EQUENCE WITH
1
DATA
EGISTER
TM
TM
1
. A round register is not
must be disabled. This is
W1
L
2-17
OADING
ROUND REGISTER
DATA
PAUSE I
2
S
TM
ADDR
EQUENCE WITH
. In
2
MPLEMENTATION
SELECT REGISTER
Horizontal Digital Image Filter
DATA
tant that the LF Interface
abled when not loading data into it.
The Filter A coefficient banks may
only be loaded with the Filter A
LF Interface
ficient banks may only be loaded with
the Filter B LF Interface
figuration and Control registers may
be loaded with either the Filter A or B
11 10 9 DESCRIPTION
0 0 0 Coefficient Banks
0 0 1 Configuration Registers
0 1 0 Filter A Select Registers
0 1 1 Filter B Select Registers
1 0 0 Filter A Round Registers
1 0 1 Filter B Round Registers
1 1 0 Filter A Limit Registers
1 1 1 Filter B Limit Registers
T
Video Imaging Products
ABLE
PAUSE I
3
8. CFA/CFB
TM
MPLEMENTATION
and the Filter B coef-
DATA
DATA
1
4
6/22/2007–LDS.3320-R
TM
11-9
TM
. The Con-
W2
W1
remain dis-
LF3320
D
ECODE