a3p250l Actel Corporation, a3p250l Datasheet - Page 116

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a3p250l

Manufacturer Part Number
a3p250l
Description
Proasic3l Low-power Flash Fpgas With Flash*freeze Technology
Manufacturer
Actel Corporation
Datasheet

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ProASIC3L DC and Switching Characteristics
Table 2-151 • RAM512X18
2 -1 0 4
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
F
Note:
AS
AH
ENS
ENH
DS
DH
CKQ1
CKQ2
WRO
CCKH
RSTBQ
REMRSTB
RECRSTB
MPWRSTB
CYC
MAX
For specific junction temperature and voltage supply levels, refer to
values.
Address setup time
Address hold time
REN_B, WEN_B setup time
REN_B, WEN_B hold time
Input data (DI) setup time
Input data (DI) hold time
Clock HIGH to new data valid on DO (output retained, WMODE = 0)
Clock HIGH to new data valid on DO (pipelined)
Address collision clk-to-clk delay for reliable read access after write on same
address
Address collision clk-to-clk delay for reliable write access after write/read on
same address
RESET_B LOW to data out LOW on DO (flow through)
RESET_B LOW to data out LOW on DO (pipelined)
RESET_B removal
RESET_B recovery
RESET_B minimum pulse width
Clock cycle time
Maximum frequency
Commercial-Case Conditions: T
J
= 70°C, Worst-Case V
Description
A d v a n c e v 0. 4
CC
= 1.14 V
Table 2-6 on page 2-7
0.33 0.39
0.00 0.00
0.12 0.14
0.24 0.29
0.00 0.00
2.88 3.39
2.00 2.35
5.75 6.61
0.08 0.09
1.19 1.40
TBD TBD
TBD TBD
1.23 1.45
1.23 1.45
0.38 0.45
0.63 0.72
174 151 MHz
–1
for derating
Std. Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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