a3p250l Actel Corporation, a3p250l Datasheet - Page 95

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a3p250l

Manufacturer Part Number
a3p250l
Description
Proasic3l Low-power Flash Fpgas With Flash*freeze Technology
Manufacturer
Actel Corporation
Datasheet

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Figure 2-30 • Output Enable Register Timing Diagram
Table 2-138 • Output Enable Register Propagation Delays
Enable
Preset
EOUT
CLK
D_Enable
Clear
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
OECLKQ
OESUD
OEHD
OESUE
OEHE
OECLR2Q
OEPRE2Q
OEREMCLR
OERECCLR
OEREMPRE
OERECPRE
OEWCLR
OEWPRE
OECKMPWH
OECKMPWL
For specific junction temperature and voltage supply levels, refer to
values.
Output Enable Register
Timing Characteristics
Commercial-Case Conditions: T
Clock-to-Q of the Output Enable Register
Data Setup Time for the Output Enable Register
Data Hold Time for the Output Enable Register
Enable Setup Time for the Output Enable Register
Enable Hold Time for the Output Enable Register
Asynchronous Clear-to-Q of the Output Enable Register
Asynchronous Preset-to-Q of the Output Enable Register
Asynchronous Clear Removal Time for the Output Enable Register
Asynchronous Clear Recovery Time for the Output Enable Register
Asynchronous Preset Removal Time for the Output Enable Register
Asynchronous Preset Recovery Time for the Output Enable Register
Asynchronous Clear Minimum Pulse Width for the Output Enable Register
Asynchronous Preset Minimum Pulse Width for the Output Enable Register
Clock Minimum Pulse Width HIGH for the Output Enable Register
Clock Minimum Pulse Width LOW for the Output Enable Register
50%
50%
t
OESUE
1
t
OEHE
50%
t
OESUD
50%
t
0
OECLKQ
t
50%
OEHD
50%
50%
t
OEWPRE
J
= 70°C, Worst-Case V
t
Description
OEPRE2Q
A dv a n c e v 0. 4
50%
50%
t
50%
OERECPRE
50%
t
t
OEWCLR
OECLR2Q
50%
50%
CC
= 1.14 V
t
50%
OERECCLR
ProASIC3L DC and Switching Characteristics
Table 2-6 on page 2-7
50%
t
OECKMPWH
t
OEREMPRE
50%
0.59 0.70
0.42 0.49
0.00 0.00
0.58 0.68
0.00 0.00
0.30 0.35
0.19 0.22
0.19 0.22
0.31 0.36
0.28 0.32
0.89 1.04
0.89 1.04
0.00 0.00
0.30 0.35
0.00 0.00
50%
–1
t
OECKMPWL
for derating
Std. Units
t
OEREMCLR
50%
50%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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