a3p250l Actel Corporation, a3p250l Datasheet - Page 123

• Manufacturer Part Number: a3p250l
• Description: Proasic3l Low-power Flash Fpgas With Flash*freeze Technology
• Manufacturer: Actel Corporation

List of Changes
Previous Version
Advance v0.3
(June 2008)
Advance v0.2
(February 2008)
The following table lists critical changes that were made in the current version of the chapter.
As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core
voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to
1.5 V.
Tables have been updated to include the LVCMOS 1.2 V I/O set.
DDR Tables have two additional data points added to reflect both edges for
Input DDR setup and hold time.
Power data table has been updated to match SmartPower data rather then
simulation values.
Table 2-1 · Absolute Maximum Ratings
parameter row and to remove the word "output" from the parameter
description for V
Table 2-2 · Recommended Operating Conditions
note references and rearrange the order of notes. VMV was added to the V
parameter row. A new row was added for V
The table note stating that 1.5 V data will be released at a later date is new.
The table note on VMV pins is new.
Table 2-4 · Overshoot and Undershoot
"as measured on quiet I/Os." Table note 2 was revised to remove "estimated
SSO density over cycles." Table note 3 was revised to remove "refers only to
overshoot/undershoot limits for simultaneous switching I/Os.
EQ 2-2
the end result changed.
The table notes for
ProASIC3L Flash*Freeze Mode*
Characteristics, ProASIC3L Sleep Mode (VCC = 0 V)*
VMV and include P
Supply Current (I
updated to include V
Table 2-9 · Quiescent Supply Current (I
(VCC, VCCI = 0 V)
Note 2 of
Flash*Freeze Mode1
include P
Table 2-11 · Summary of I/O Input Buffer Power (per pin) – Default I/O Software
Settings
Default I/O Software
to P
V
Banks" to "Applicable to Pro I/O Banks."
The word "input" in the titles of
Power (per pin) – Default I/O Software Settings1
I/O Output Buffer Power (per pin) – Default I/O Software
changed to "output."
CCI
DC7
. The subtitle of the table was changed from "Applicable to Advanced I/O
. The table notes were updated to reflect that power was measured on
was updated. The temperature was changed to 100°C, and therefore
through
DC6
and P
Table 2-10 · Quiescent Supply Current (I
CCI
is new.
Table 2-16 · Summary of I/O Output Buffer Power (per pin) –
Changes in Current Version (Advance v0.4)
DC7
DD
. Table note 3 was added.
Table 2-7 · Quiescent Supply Current (I
DC6
JTAG
) Characteristics, ProASIC3L Flash*Freeze Mode*
was updated to include V
.
Settings1were updated to change P
.
and P
A dv a n c e v 0. 4
DC7
and
. The table note for
Table 2-14 · Summary of I/O Output Buffer
Table 2-8 · Quiescent Supply Current (I
Limits1. The title was revised to remove
was updated to add VMV to the V
DD
) Characteristics, Shutdown Mode
CC
, 1.5 V DC core supply voltage.
CCPLL
1
and
was updated to add table
ProASIC3L DC and Switching Characteristics
. Note 4 was updated to
were updated to remove
Table 2-15 · Summary of
DC2
DD
Table 2-7 · Quiescent
DD
"
), No ProASIC3L
to P
) Characteristics,
Settings1, was
DC6
and P
was
DD
DC3
CCI
CCI
)
through
Page
2-11,
2-12
2-12
N/A
N/A
2-1
2-2
2-3
2-6
2-7
2-7
2-8
2-9
2 -111