a3p250l Actel Corporation, a3p250l Datasheet - Page 6

• Manufacturer Part Number: a3p250l
• Description: Proasic3l Low-power Flash Fpgas With Flash*freeze Technology
• Manufacturer: Actel Corporation

ProASIC3L Device Family Overview
1 -2
Flash Advantages
Low Power
The ProASIC3L family of Actel flash-based FPGAs provide a low-power advantage, and when
coupled with high performance, enables designers to make power-smart choices using a single-
chip, reprogrammable, and live-at-power-up device.
ProASIC3L devices offer 40% dynamic power and 50% static power savings by reducing the core
operating voltage to 1.2 V. In addition, the Power Driven Layout (PDL) feature in Libero
Integrated Design Environment (IDE) offers up to 30% additional power reduction. With
Flash*Freeze technology, ProASIC3L is able to retain device SRAM and logic while dynamic power is
reduced to a minimum, without the need to stop clock or power supplies. Combining these
features provides a low-power, feature-rich and high-performance solution.
Security
Nonvolatile, flash-based ProASIC3L devices do not require a boot PROM, so there is no vulnerable
external bitstream that can be easily copied. ProASIC3L devices incorporate FlashLock, which
provides a unique combination of reprogrammability and design security without external
overhead, advantages that only an FPGA with nonvolatile flash programming can offer.
ProASIC3L devices utilize a 128-bit flash-based lock and a separate AES key to secure programmed
intellectual property and configuration data. In addition, all FlashROM data in ProASIC3L devices
can be encrypted prior to loading, using the industry-leading AES-128 (FIPS192) bit block cipher
encryption standard. AES was adopted by the National Institute of Standards and Technology
(NIST) in 2000 and replaces the 1977 DES standard. ProASIC3L devices have a built-in AES
decryption engine and a flash-based AES key that make them the most comprehensive
programmable logic device security solution available today. ProASIC3L devices with AES-based
security allow for secure, remote field updates over public networks such as the Internet, and
ensure that valuable IP remains out of the hands of system overbuilders, system cloners, and IP
thieves. The contents of a programmed device cannot be read back, although secure design
verification is possible.
Security, built into the FPGA fabric, is an inherent component of the ProASIC3L family. The flash
cells are located beneath seven metal layers, and many device design and layout techniques have
been used to make invasive attacks extremely difficult. The ProASIC3L family, with FlashLock and
AES security, is unique in being highly resistant to both invasive and noninvasive attacks. Your
valuable IP is protected and secure, making remote ISP possible. A ProASIC3L device provides the
most impenetrable security for programmable logic designs.
Single Chip
Flash-based FPGAs store their configuration information in on-chip flash cells. Once programmed,
the configuration data is an inherent part of the FPGA structure, and no external configuration
data needs to be loaded at system power-up (unlike SRAM-based FPGAs). Therefore, flash-based
ProASIC3L FPGAs do not require system configuration components such as EEPROMs or
microcontrollers to load device configuration data. This reduces bill-of-materials costs and PCB
area, and increases security and system reliability.
Live at Power-Up
The Actel flash-based ProASIC3L devices support Level 0 of the LAPU classification standard. This
feature helps in system component initialization, execution of critical tasks before the processor
wakes up, setup and configuration of memory blocks, clock generation, and bus activity
management. The LAPU feature of flash-based ProASIC3L devices greatly simplifies total system
design and reduces total system cost, often eliminating the need for CPLDs and clock generation
PLLs. In addition, glitches and brownouts in system power will not corrupt the ProASIC3L device's
flash configuration, and unlike SRAM-based FPGAs, the device will not have to be reloaded when
system power is restored. This enables the reduction or complete removal of the configuration
PROM, expensive voltage monitor, brownout detection, and clock generator devices from the PCB
design. Flash-based ProASIC3L devices simplify total system design and reduce cost and design risk
while increasing system reliability and improving system initialization time.
v1.1
®