afbr-820bz Avago Technologies, afbr-820bz Datasheet
afbr-820bz
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afbr-820bz Summary of contents
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... With Pin heat sink / EMI nose clip AFBR-810BHZ With no heat sink / no EMI nose clip AFBR-810BEHZ With no heat sink/ EMI nose clip Receiver Part Numbers AFBR-820BZ With Fin heat sink / no EMI nose clip AFBR-820BEZ With Fin heat sink / EMI nose clip AFBR-820BPZ ...
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Transmitter Module The optical transmitter module (see Figure 1) incorporates a 12-channel VCSEL (Vertical Cavity Surface Emitting Laser) array, a 12-channel input buffer and laser driver, diagnos- tic monitors, control and bias blocks. The transmitter is designed for IEC-60825 and ...
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Receiver Module The optical receiver module (see Figure 2) incorporates a 12-channel PIN photodiode array, a 12-channel pre- amplifier and output buffer, diagnostic monitors, control and bias blocks. The Rx Output Buffer provides CML compatible differential outputs for the high ...
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High Speed Signal Interface Figure 3 shows the interface between an ASIC/SerDes and the fiber Optic modules. For simplicity, only one channel is shown. As shown in the Figure 3, the compliance points are on the host board side of ...
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... Section for details regarding these and component recognition. Please note the transmitter module is a Class 1M laser product – DO NOT VIEW RADIATION DIRECTLY WITH OPTICAL INSTRUMENTS. See Regulatory Compliance Table for details. When released, the AFBR- will support this table. 5 Package Outline The module is designed to meet the package outline defi ...
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... Link Model and Reference Channel Performance specifications for the AFBR-810 Transmitter and AFBR-820 Receiver are based on a reference channel model. A reference channel model provides the basis for inter-operability between independently produced trans- mitter and receiver modules. The reference model used for ...
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Informative TX parameters trading off each other while guaranteeing TP2 & TP4 performance Parameter Extinction Ratio Output Optical Modulation Amplitude Output Rise/Fall Time Relative Intensity Noise OMA Contributed Portion of Accumulated Deterministic Jitter Contributed Portion of Accumulated Total Jitter Informative ...
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Absolute Maximum Ratings Stress in excess of any of the individual Absolute Maximum Ratings can cause immediate catastrophic damage to the module even if all other parameters are within Recommended Operation Conditions. It should not be assumed that limiting values ...
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Recommended Operating Conditions Recommended Operating Conditions specify parameters for which the optical and electrical characteristics hold unless otherwise noted. Optical and electrical characteristics are not defined for operation outside the Recommended Operating Conditions, reliability is not implied and damage to ...
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Transmitter Electrical Characteristics* The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc33 = 3.3 V and Vcc25 = 2.5 V. Parameter Power Consumption Power Supply Current – Vcc25 ...
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... IEEE P802.3ae clause 52.9.1, or equivalent, operating at 10 GBd with characteristics that are equivalent to that of an AFBR 810B transmitter module and maximum cable length operating per the Recommended Operation Conditions as the test source. Effects of impairments in the test signals due to the test system are removed from the measurement. All channels not under test are operating with similar test patterns. 11. Eye Opening is defi ...
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Control Characteristics: Transmitter/Receiver The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc33 = 3.3 V and Vcc25 = 2.5 V. Parameter Control* Input Voltage Hysteresis LVTTL Control* Input ...
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Transmitter Optical Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc33 = 3.3 V and Vcc25 = 2.5 V. Parameter Output Optical Power: Average Output Optical Power: ...
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... Effects of impairments in the test signal due to the test system are removed from the measurement. 3. Signal Detect Hysteresis is defined as 10 Log(LOS De-assert Level / LOS Assert Level). Regulatory Compliance Table (When released, the AFBR-810BxxZ and AFBR-820xxxZ will support this table.) Feature Test Method ...
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Transmitter Module Contact Assignment and Signal Description Optical Connector Side Adr2 GND GND GND GND B Adr1 GND Din1p GND Din4p GND C Adr0 GND Din1n GND Din4n GND D GND Din0p GND Din3p ...
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Receiver Module Contact Assignment and Signal Description Optical Connector Side Adr2 GND GND GND GND Adr1 GND Dout1p GND Dout4p GND Dout8n GND Dout11n GND Adr0 GND Dout1n GND Dout4n GND Dout8p GND Dout11p GND GND Dout0p GND Dout3p GND ...
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Case Temperature Measurement Point Figure 11. Case Temperature Measurement Point Host Supply Module Vcc 0.1 PF Figure 12. Recommended Tx Power Supply Filter Host Supply Module Vcc 0.1 PF Figure 13. Recommended ...
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> 2.375 PWRINIT Normal ... Disabled Operation TX Outputs Normal Disabled Operation RX Outputs Normal Inhibited Operation TWS Signals Figure 18. Power-up Sequence Interrupt Event t FLAG ON Flag ...
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Input LOS Event Normal TX Output Operation Squelched Normal RX Output Operation Squelched t FLAG ON Flag Bit t INTL ON IntL Figure 22. LOS Squelch Sequence OFF Normal Operation t ...
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... Package Outline, Host PCB Footprint and Panel Cutout 8.63 to OCL channel 0 channel 11 Figure 23. Package Outline AFBR-810BHZ and AFBR-820BHZ Package outline dimensions are nominal expressed in mm unless otherwise stated. The mating host PCB mounted electrical connector is a 100 position FCI MEG-Array 20 14.34 41.07 ref. 8.95 32.12 4.1 2.0 Pin A1 Location ...
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... Figure 24. Package Outline AFBR-810BEPZ and AFBR-820BEPZ Package outline dimensions are nominal expressed in mm unless otherwise stated. The mating host PCB mounted electrical connector is a 100 position FCI MEG-Array 21 2.7 1.8 sq. typ. 2.7 typ. 4.7 12.90 £ Plug (FCI PN: 84512-102) or equivalent. ...
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Figure 25. Host Board Module Footprint (Top View) and Module (Side View) – Mid-Plane Mount Dimensions are ...
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Pin A1 16.0±.10 1.93±.10 Figure 26. Host Board Module Footprint (Top and Side Views) – Panel Mount Dimensions are nominal expressed in mm unless ...
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Control Interface & Memory Map The control interface combines dedicated signal lines for address inputs, Adr[2:0], interrupt output, IntL, and reset input, ResetL, with two-wire serial, TWS, interface clock, SCL, and data, SDA, signals to provide users rich function- ality ...
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Memory Map Overview The memory is structured as a single address, multiple page approach after that in the XFP MSA and adapted by QSFP MSA for multi-channel transceivers. Figure 27 presents an overview of the memory structure showing a ...
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Memory Map Timing Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc33 = 3.3 V and Vcc25 = 2.5 V. Parameter Symbol Flag (including Tx Fault ...
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Tx Memory Map 5ih Lower Page Details of the base or lower page of the memory map for a transmitter follow. Address Type Field Name/Description Byte Bit 0 all RO Type Identifier: Coded 00h for unspecified 1 all RO ...
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Address Type Field Name/Description Byte Bit 15 all RO Reserved: Coded 00h High Tx Bias Current Alarm Latched Channel 11: Coded 1 when asserted, Latched, Clears on Read Low Tx Bias Current Alarm Latched ...
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Address Type Field Name/Description Byte Bit High Tx Power Alarm Latched Channel 7: Coded 1 when asserted, Latched, Clears on Read Low Tx Power Alarm Latched Channel 7: Coded 1 when asserted, Latched, Clears ...
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Address Type Field Name/Description Byte Bit Tx Bias Current Monitor Channel 1: Bias current units coded as 16 bit unsigned integer, Byte 60 is MSB. 60-61 all RO Tolerance is ± 0.50 mA. Tx Bias Current Monitor ...
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Address Type Field Name/Description Byte Bit 95 7 RWv Squelch Disable Channel 7: Writing 1 inhibits squelch for the channel, Default RWv Squelch Disable Channel 6: Writing 1 inhibits squelch for the channel, Default is 0. ...
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Address Type Field Name/Description Byte Bit 116 7 RWv Mask High Internal Temperature Alarm: Writing 1 Prevents IntL generation, Default = 0 116 6 RWv Mask Low Internal Temperature Alarm: Writing 1 Prevents IntL generation, Default = 0 116 5-0 ...
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... Vendor Name in ASCII: Coded “AVAGO” for Avago Technologies, Spaces (20h) for unused characters Vendor OUI (IEEE ID): Coded “00h 17h 6Ah” for Avago Technologies Vendor Part Number in ASCII: AFBR-810B… where bytes 180 through 186 vary with selected option, Spaces (20h) for unused characters Vendor Revision Number in ASCII: Coded “02” ...
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Tx Memory Map 01h Upper Page Details of transmitter upper page 01h follow. Address Type Field Name/Description Byte Bit 128 all RO Internal Temperature High Alarm Threshold MSB: Integer part coded in signed 2’s complement 129 all RO Internal ...
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Address Type Field Name/Description Byte Bit 233 7-4 RWn Tx Input Equalization Control Channel 1: See below for code description. Default = 7 233 3-0 RWn Tx Input Equalization Control Channel 0: See below for code description. Default = 7 ...
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Address Type Field Name/Description Byte Bit 251 5-4 RWv Reserved 251 3 RWv Mask High Tx Power Alarm Channel 8: Writing 1 Prevents IntL generation, Default = 0 251 2 RWv Mask Low Tx Power Alarm Channel 8: Writing 1 ...
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Rx Memory Map 5ih Lower Page Details of the base or lower page of the memory map for a receiver follow. Address Type Field Name/Description Byte Bit 0 all RO Type Identifier: Coded 00h for unspecified 1 all RO ...
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Address Type Field Name/Description Byte Bit High Rx Power Alarm Latched Channel 7: Coded 1 when asserted, Latched, Clears on Read Low Rx Power Alarm Latched Channel 7: Coded 1 when asserted, Latched, Clears ...
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Address Type Field Name/Description Byte Bit Rx Optical Input, Pave, Monitor Channel 3: Optical power in 0.1 PW units coded as 16 bit unsigned integer, Byte 80 80-81 all RO is MSB. Tolerance is ± 3dB for -10 dBm to ...
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Address Type Field Name/Description Byte Bit 98 7-6 RWv Rate Select Channel 3: Write 00 for max. BW, 01 for SDR BW, rest reserved. Default 5-4 RWv Rate Select Channel 2: Write 00 for max. BW, 01 ...
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... Vendor Name in ASCII: Coded “AVAGO” for Avago Technologies, Spaces (20h) for unused characters Vendor OUI (IEEE ID): Coded “00h 17h 6Ah” for Avago Technologies Vendor Part Number in ASCII: AFBR-820B… where bytes 180 through 186 vary with selected option, Spaces (20h) for unused characters Vendor Revision Number in ASCII: Coded “02” ...
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Rx Memory Map 01h Upper Page Details of receiver upper page 01h follow. Address Type Field Name/Description Byte Bit 128 all RO Internal Temperature High Alarm Threshold MSB: Integer part coded in signed 2’s complement 129 all RO Internal ...
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Address Type Field Name/Description Byte Bit 234 7-4 RWn Rx Output De-emphasis Control: Channel 11. See below for code description. Default = 0 234 3-0 RWn Rx Output De-emphasis Control: Channel 10. See below for code description. Default = 0 ...
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Receiver Output Amplitude Control Code Description Control registers 228 through 233 permit output signal amplitude selection. Four bit code blocks (either bits 7 through through 0 where bit the msb) are assigned to ...
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Serial ID 00h Upper Page Description Description of Serial id page 00h codes follows. Byte 128 Module Type Address Field Name/Description Byte Code Module Type 128 Type Identifier: See SFF-8472 for reference, also SFP & XFP MSA, Coded 00h ...
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Byte 133 Module Description Max Signal Rate per channel Address Field Name/Description Byte Code 133 00h Unknown/unspecified Max Signal Rate = binary value x 100 Mb/s Byte 134 - 137 Module Description Wavelength & Tolerance Address Field Name/Description Byte Code ...
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Byte 141 Supported Functions – Controls Address Field Name/Description Byte Bit Code 141 7-6 00 Channel Disable Control not provided/unspecified 7-6 01 Global Channel Disable Control implemented 7-6 10 Individual and independent Channel Disable Control implemented 7-6 11 Reserved 5-4 ...
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... Vendor Specific – 32 bytes For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. ...