afbr-820bz Avago Technologies, afbr-820bz Datasheet - Page 26

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afbr-820bz

Manufacturer Part Number
afbr-820bz
Description
Twelve-channel Transmitter And Receiver Pluggable, Parallel-fiber-optic Modules
Manufacturer
Avago Technologies
Datasheet
2. Memory Map Timing Characteristics
The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical
values are for Tc = 40°C, Vcc33 = 3.3 V and Vcc25 = 2.5 V.
Notes:
1. Max values are valid where competing TWS traffic is absent.
2. The outputs of affected channels are disabled for incidences of Tx Fault and squelched for Tx LOS and/or Rx LOS. Timing for output fault and
26
Parameter
Flag (including Tx Fault & LOS)
Assert Time
Flag (including Tx Fault & LOS)
Clear Time
Channel Disable Assert Time
Channel Disable De-assert Time
Mask Assert Time
Mask De-assert Time
Volatile Control Assert Time
(except Channel Disable)
Volatile Control De-assert Time
(except Channel Disable)
Control Transition Period
Non-Volatile Control Assert Time
Non-Volatile Control De-assert
Time
Non-Volatile Control Assert Time
Non-Volatile Control De-assert
Time
Module Reset Assert Time
Module Reset De-assert Time
squelch assertion and de-assertion are found in the Receiver Electrical and Transmitter Optical Characteristics sections.
2
2
Symbol
t
t
t
t
t
t
FLAG ON
FLAG OFF
DIS ON
DIS OFF
CNTL ON
CNTL XP
Min
Typ
10
Max
100
100
100
300
100
100
100
100
150
150
300
300
100
500
1
Units
ms
ms
ms
ms
ms
ms
ms
ms
Ps
ms
ms
ms
ms
ms
ms
Reference
Figure 20, Time from occurrence of condition to IntL
assertion, Vout:IntL = Vol
Figure 20, Time for clear on read operation, measured
from falling SCL edge after stop bit of read
transaction, until Vout:IntL = Voh, where IntL
is in static mode
Figure 21, Time from write operation, measured from
falling edge of SCL after stop bit of write transaction,
until channel output falls below 10% of nominal
Figure 21, Time from write operation, measured from
falling edge of SCL after stop bit of write transaction,
until channel output rises above 90% of nominal
Time from write operation, measured from falling
edge of SCL after stop bit of write transaction, until
associated IntL is inhibited
Time from write operation, measured from falling
edge of SCL after stop bit of write transaction, until
associated IntL resumes
Time from write operation, measured from falling
edge of SCL after stop bit of write transaction, until
associated control is activated
Time from write operation, measured from falling
edge of SCL after stop bit of write transaction, until
associated control is de-activated
Time during the control assert time when signal
integrity may be impaired
Time from up to two byte write operation, measured
from falling edge of SCL after stop bit of write
transaction, until associated control is activated
Time from up to two byte write operation, measured
from falling edge of SCL after stop bit of write
transaction, until associated control is de-activated
Time from up to six byte write operation, measured
from falling edge of SCL after stop bit of write
transaction, until associated control is activated
Time from up to six byte write operation, measured
from falling edge of SCL after stop bit of write
transaction, until associated control is de-activated
Time from write operation, measured from falling
edge of SCL after stop bit of write transaction, until
associated reset begins
Time from write operation, measured from falling
edge of SCL after stop bit of write transaction, until
associated reset is completed and normal operation
resumes

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