EVB9221-MINI SMSC, EVB9221-MINI Datasheet - Page 124

EVALUATION BOARD LAN9221-ABZJ

EVB9221-MINI

Manufacturer Part Number
EVB9221-MINI
Description
EVALUATION BOARD LAN9221-ABZJ
Manufacturer
SMSC
Datasheet

Specifications of EVB9221-MINI

Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
No
Utilized Ic / Part
LAN9221
Primary Attributes
1 Port, 100BASE-TX/10BASE-T
Secondary Attributes
16-Bit, HP Auto-MDIX, Full and Half Duplex Support, 32-Bit CRC
Processor To Be Evaluated
LAN9221
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1074
Revision 2.7 (03-15-10)
5.5.9
ADDRESS
15-8
MODE
7:5
4:0
000
001
010
100
101
011
110
111
Special Modes
Note 5.4
Reserved
MODE: PHY Mode of operation. Refer to
PHYAD: PHY Address:
The PHY Address is used for the SMI address.
10Base-T Half Duplex. Auto-negotiation disabled.
10Base-T Full Duplex. Auto-negotiation disabled.
100Base-TX Half Duplex. Auto-negotiation disabled.
CRS is active during Transmit & Receive.
100Base-TX Full Duplex. Auto-negotiation disabled.
CRS is active during Receive.
100ase-TX Half Duplex is advertised. Auto-
negotiation enabled.
CRS is active during Transmit & Receive.
Repeater mode. Auto-negotiation enabled.
100Base-TX Half Duplex is advertised.
CRS is active during Receive.
Reserved - Do not set the LAN9221/LAN9221i in
this mode.
All capable. Auto-negotiation enabled.
Index (In Decimal):
When MODE=111, the register 0 bits 13 and 8 are variable dependant on the auto-
negotiated speed and duplex.
MODE DEFINITIONS
Table 5.9 MODE Control
DESCRIPTION
18
DATASHEET
124
Table 5.9
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Size:
for more details.
DEFAULT REGISTER BIT VALUES
REGISTER 0
[13,12,10,8]
Note 5.4
X10X
0000
0001
1000
1001
1100
1100
N/A
16-bits
NASR
NASR
NASR
TYPE
SMSC LAN9221/LAN9221i
RW,
RW,
RW,
REGISTER 4
[8,7,6,5]
0100
0100
1111
N/A
N/A
N/A
N/A
N/A
DEFAULT
00001b
Datasheet
111

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