EVB9221-MINI SMSC, EVB9221-MINI Datasheet - Page 60
EVB9221-MINI
Manufacturer Part Number
EVB9221-MINI
Description
EVALUATION BOARD LAN9221-ABZJ
Manufacturer
SMSC
Datasheet
1.LAN9221-ABZJ.pdf
(152 pages)
Specifications of EVB9221-MINI
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
No
Utilized Ic / Part
LAN9221
Primary Attributes
1 Port, 100BASE-TX/10BASE-T
Secondary Attributes
16-Bit, HP Auto-MDIX, Full and Half Duplex Support, 32-Bit CRC
Processor To Be Evaluated
LAN9221
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1074
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Revision 2.7 (03-15-10)
3.12.6.3
TX Example 3
In this example a single, 111-Byte Ethernet packet will be transmitted with a TX checksum. This packet
is divided into four buffers. The four buffers are as follows:
Buffer 0:
Buffer 1:
Buffer 2:
Buffer 3:
Figure 3.15, "TX Example 1"
how data is passed to the TX data FIFO.
Note: In order to perform a TX checksum calculation on the associated packet, bit 14 (CK) of the TX
4-Byte “Data Start Offset”
4-Byte Checksum Preamble
16-Byte “Buffer End Alignment”
7-Byte “Data Start Offset”
79-Bytes of payload data
16-Byte “Buffer End Alignment”
0-Byte “Data Start Offset”
15-Bytes of payload data
16-Byte “Buffer End Alignment”
10-Byte “Data Start Offset”
17-Bytes of payload data
16-Byte “Buffer End Alignment”
Command ‘B’ must be set in conjunction with bit 13 (FS) of TX Command ‘A’ and bit 16
(TXCOE_EN) of the COE_CR register. For more information, refer to
Checksum Offload Engine
illustrates the TX command structure for this example, and also shows
(TXCOE)".
DATASHEET
60
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Section 3.6.2, "Transmit
SMSC LAN9221/LAN9221i
Datasheet
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