KDC5612EVAL Intersil, KDC5612EVAL Datasheet - Page 8

• Manufacturer Part Number: KDC5612EVAL
• Description: DAUGHTER CARD FOR KAD5612
• Manufacturer: Intersil
• Series: FemtoCharge™r

Specifications of KDC5612EVAL

• Number Of Adc's: 2
• Number Of Bits: 12
• Sampling Rate (per Second): 250M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 1.47 Vpp
• Power (typ) @ Conditions: 429mW @ 250MSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: KAD5612P-25, KMB001 Motherboard
• For Use With: KMB001LEVAL - MOTHERBOARD FOR LVDS ADC CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pinout/Package Information
Pin Descriptions
2-5, 17, 18, 28-31
1, 6, 19, 24, 71
PIN NUMBER
26, 45, 55, 65
7, 10-12, 72
27, 36, 56
13, 14
20, 21
8, 9
15
16
22
23
25
32
33
34
35
37
38
39
40
41
42
43
44
46
47
48
49
LVDS [LVCMOS] NAME
8
CLKP, CLKN
AINN, AINP
BINP, BINN
OUTMODE
CLKOUTN
CLKOUTP
[CLKOUT]
RESETN
NAPSLP
CLKDIV
RLVDS
OVDD
AVDD
OVSS
AVSS
VCM
DNC
D0N
[NC]
D0P
D1N
[NC]
D1P
D2N
[NC]
D2P
D3N
[NC]
D3P
D4N
[NC]
D4P
D5N
[NC]
D5P
[NC]
D6N
[NC]
[D0]
[D1]
[D2]
[D3]
[D4]
[D5]
1.8V Analog Supply
Do Not Connect
Analog Ground
B-Channel Analog Input Positive, Negative
A-Channel Analog Input Negative, Positive
Common Mode Output
Clock Divider Control
Clock Input True, Complement
Output Mode (LVDS, LVCMOS)
Power Control (Nap, Sleep modes)
Power On Reset (Active Low, see “User-Initiated Reset” on page 15)
Output Ground
1.8V Output Supply
LVDS Bit 0 (LSB) Output Complement
[NC in LVCMOS]
LVDS Bit 0 (LSB) Output True
[LVCMOS Bit 0]
LVDS Bit 1 Output Complement
[NC in LVCMOS]
LVDS Bit 1 Output True
[LVCMOS Bit 1]
LVDS Bit 2 Output Complement
[NC in LVCMOS]
LVDS Bit 2 Output True
[LVCMOS Bit 2]
LVDS Bit 3 Output Complement
[NC in LVCMOS]
LVDS Bit 3 Output True
[LVCMOS Bit 3]
LVDS Bit 4 Output Complement
[NC in LVCMOS]
LVDS Bit 4 Output True
[LVCMOS Bit 4]
LVDS Bit 5 Output Complement
[NC in LVCMOS]
LVDS Bit 5 Output True
[LVCMOS Bit 5]
LVDS Bias Resistor (connect to OVSS with a 10kΩ, 1% resistor)
LVDS Clock Output Complement
[NC in LVCMOS]
LVDS Clock Output True
[LVCMOS CLKOUT]
LVDS Bit 6 Output Complement
[NC in LVCMOS]
KAD5612P
LVDS [LVCMOS] FUNCTION
September 9, 2009
FN6803.2