PIC18LF25J11-I/SO Microchip Technology, PIC18LF25J11-I/SO Datasheet - Page 170

• Manufacturer Part Number: PIC18LF25J11-I/SO
• Description: IC PIC MCU FLASH 32K 2V 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF25J11-I/SO

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F46J11 FAMILY
REGISTER 10-5:
REGISTER 10-6:
DS39932C-page 170
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
PTEN7
R/W-0
U-0
—
This register is only available in 44-pin devices.
This register is only available in 44-pin devices.
Unimplemented: Read as ‘0’
PTEN14: PMCS1 Port Enable bit
1 = PMCS1 chip select line
0 = PMCS1 functions as port I/O
Unimplemented: Read as ‘0’
PTEN<7:2>: PMP Address Port Enable bits
1 = PMA<7:2> function as PMP address lines
0 = PMA<7:2> function as port I/O
PTEN<1:0>: PMALH/PMALL Strobe Enable bits
1 = PMA<1:0> function as either PMA<1:0> or PMALH and PMALL
0 = PMA<1:0> pads functions as port I/O
PTEN14
PTEN6
R/W-0
R/W-0
PMEH: PARALLEL PORT ENABLE REGISTER HIGH BYTE (BANKED F57h)
PMEL: PARALLEL PORT ENABLE REGISTER LOW BYTE (BANKED F56h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PTEN5
R/W-0
U-0
—
PTEN4
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PTEN3
R/W-0
U-0
—
PTEN2
R/W-0
U-0
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
PTEN1
R/W-0
U-0
—
PTEN0
R/W-0
U-0
—
(1)
(1)
bit 0
bit 0