PIC18LF25J11-I/SO Microchip Technology, PIC18LF25J11-I/SO Datasheet - Page 256

IC PIC MCU FLASH 32K 2V 28-SOIC

PIC18LF25J11-I/SO

Manufacturer Part Number
PIC18LF25J11-I/SO
Description
IC PIC MCU FLASH 32K 2V 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF25J11-I/SO

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F46J11 FAMILY
FIGURE 17-13:
17.5.3
When any PWM mode is used, the application
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
The CCPxM<1:0> bits of the CCPxCON register allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (PxA/PxC and PxB/PxD). The PWM output
DS39932C-page 256
Note:
Shoot-Through Current
Note 1: All signals are shown as active-high.
External Switch C
External Switch D
2: T
3: T
START-UP CONSIDERATIONS
When the microcontroller is released from
Reset, all of the I/O pins are in the
high-impedance
circuits must keep the power switch
devices in the OFF state until the micro-
controller drives the I/O pins with the
proper signal levels or activates the PWM
output(s).
ON
OFF
Potential
is the turn-on delay of power switch QC and its driver.
is the turn-off delay of power switch QD and its driver.
PxA
PxB
PxC
PxD
EXAMPLE OF PWM DIRECTION CHANGE AT NEAR 100% DUTY CYCLE
state.
The
Forward Period
external
PW
polarities must be selected before the PWM pin output
drivers are enabled. Changing the polarity configura-
tion while the PWM pin output drivers are enabled is
not recommended since it may result in damage to the
application circuits.
The PxA, PxB, PxC and PxD output latches may not be
in the proper states when the PWM module is
initialized. Enabling the PWM pin output drivers at the
same time as the Enhanced PWM modes may cause
damage to the application circuit. The Enhanced PWM
modes must be enabled in the proper Output mode and
complete a full PWM cycle before enabling the PWM
pin output drivers. The completion of a full PWM cycle
is indicated by the TMR2IF or TMR4IF bit of the PIR1
or PIR3 register being set as the second PWM period
begins.
t1
T
ON
Reverse Period
T
T = T
OFF
OFF
PW
© 2009 Microchip Technology Inc.
– T
ON

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