PIC18LF25J11-I/SO Microchip Technology, PIC18LF25J11-I/SO Datasheet - Page 249

• Manufacturer Part Number: PIC18LF25J11-I/SO
• Description: IC PIC MCU FLASH 32K 2V 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF25J11-I/SO

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.5
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10 bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the PxM bits of the
CCPxCON register must be set appropriately.
FIGURE 17-5:
© 2009 Microchip Technology Inc.
Note 1: The TRIS register value for each PWM output must be configured appropriately.
Note 1: The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to
2: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
PWM (Enhanced Mode)
CCPR1H (Slave)
Duty Cycle Registers
Comparator
2: These pins are remappable.
CCPR1L
PR2
TMR2
Comparator
create the 10-bit time base.
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
(1)
Clear Timer2,
toggle PWM pin and
latch duty cycle
DC1B<1:0>
R
S
PxM<1:0>
Q
ECCP1DEL
ECCPx/PxA
Controller
Output
PIC18F46J11 FAMILY
2
The PWM outputs are multiplexed with I/O pins and are
designated: PxA, PxB, PxC and PxD. The polarity of the
PWM pins is configurable and is selected by setting the
CCPxM bits in the CCPxCON register appropriately.
Table 17-1 provides the pin assignments for each
Enhanced PWM mode.
Figure 17-5 provides an example of a simplified block
diagram of the Enhanced PWM module.
Note:
PxB
PxC
PxD
4
CCPxM<3:0>
(2)
(2)
(2)
(2)
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
TRIS
TRIS
TRIS
TRIS
prevent
the
generation
ECCP1/RPn
RPn
PRn
PRn
DS39932C-page 249
of
an