PIC18LF25J11-I/SO Microchip Technology, PIC18LF25J11-I/SO Datasheet - Page 99

• Manufacturer Part Number: PIC18LF25J11-I/SO
• Description: IC PIC MCU FLASH 32K 2V 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF25J11-I/SO

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 6-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘0’
WPROG: One Word-Wide Program bit
1 = Program 2 bytes on the next WR command
0 = Program 64 bytes on the next WR command
FREE: Flash Erase Enable bit
1 = Perform an erase operation on the next WR command (cleared by hardware after completion of
0 = Perform write only
WRERR: Flash Program Error Flag bit
1 = A write operation is prematurely terminated (any Reset during self-timed programming in normal
0 = The write operation completed
WREN: Flash Program Write Enable bit
1 = Allows write cycles to Flash program memory
0 = Inhibits write cycles to Flash program memory
WR: Write Control bit
1 = Initiates a program memory erase cycle or write cycle
0 = Write cycle is complete
Unimplemented: Read as ‘0’
U-0
erase)
operation, or an improper write attempt)
(The operation is self-timed and the bit is cleared by hardware once write is complete. The WR bit
can only be set (not cleared) in software.)
—
EECON1: EEPROM CONTROL REGISTER 1 (ACCESS FA6h)
S = Settable bit (cannot be cleared in software)
W = Writable bit
‘1’ = Bit is set
WPROG
R/W-0
R/W-0
FREE
PIC18F46J11 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WRERR
R/W-x
WREN
R/W-0
x = Bit is unknown
R/S-0
WR
DS39932C-page 99
U-0
—
bit 0