PIC18LF25J11-I/SO Microchip Technology, PIC18LF25J11-I/SO Datasheet - Page 38

IC PIC MCU FLASH 32K 2V 28-SOIC

PIC18LF25J11-I/SO

Manufacturer Part Number
PIC18LF25J11-I/SO
Description
IC PIC MCU FLASH 32K 2V 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF25J11-I/SO

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F46J11 FAMILY
REGISTER 2-2:
DS39932C-page 38
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-4
bit 3
bit 2
bit 1-0
Note 1:
IDLEN
R/W-0
2:
3:
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
Default output frequency of INTOSC on Reset (4 MHz).
Source selected by the INTSRC bit (OSCTUNE<7>).
IDLEN: Idle Enable bit
1 = Device enters Idle mode on SLEEP instruction
0 = Device enters Sleep mode on SLEEP instruction
IRCF<2:0>: Internal Oscillator Frequency Select bits
111 = 8 MHz (INTOSC drives clock directly)
110 = 4 MHz
101 = 2 MHz
100 = 1 MHz
011 = 500 kHz
010 = 250 kHz
001 = 125 kHz
000 = 31 kHz (from either INTOSC/256 or INTRC directly)
OSTS: Oscillator Start-up Time-out Status bit
1 = Oscillator Start-up Timer time-out has expired; primary oscillator is running
0 = Oscillator Start-up Timer time-out is running; primary oscillator is not ready
Unimplemented: Read as ‘1’
SCS<1:0>: System Clock Select bits
11 = Postscaled internal clock (INTRC/INTOSC derived)
10 = Reserved
01 = Timer1 oscillator
00 = Primary clock source (INTOSC postscaler output when FOSC<2:0> = 001 or 000)
00 = Primary clock source (CPU divider output for other values of FOSC<2:0>)
IRCF2
R/W-1
OSCCON: OSCILLATOR CONTROL REGISTER (ACCESS FD3h)
(2)
W = Writable bit
‘1’ = Bit is set
IRCF1
R/W-1
R/W-0
IRCF0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
OSTS
R-1
(1)
(3)
U-1
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
SCS1
R/W-0
SCS0
bit 0

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