PIC18F25J11-I/ML Microchip Technology, PIC18F25J11-I/ML Datasheet - Page 284
![IC PIC MCU FLASH 32K 2V 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F25J11-I/ML
Manufacturer Part Number
PIC18F25J11-I/ML
Description
IC PIC MCU FLASH 32K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18F25J11-I/ML
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F25J11-I/ML
Manufacturer:
MICROCHIP
Quantity:
4 000
- Current page: 284 of 528
- Download datasheet (8Mb)
PIC18F46J11 FAMILY
EXAMPLE 18-2:
DS39932C-page 284
;
;DestBuf
;
;SrcBuf
;
PrepareTransfer:
BeginXfer:
movlw
movwf
movlw
movwf
movlw
movwf
movlw
movwf
movlw
movwf
movlw
movwf
bsf
;Execute whatever
udata
res
res
HIGH(DestBuf)
RXADDRH
LOW(DestBuf)
RXADDRL
HIGH(SrcBuf)
TXADDRH
LOW(SrcBuf)
TXADDRL
0x01
DMABCH
0xFF
DMABCL
DMACON1, DMAEN
512-BYTE SPI MASTER MODE Init AND TRANSFER (CONTINUED)
0x500
0x200
0x200
;Somewhere else in our project, lets assume we have
;allocated some RAM for use as SPI receive and
;transmit buffers.
;Let’s reserve 0x500-0x6FF for use as our SPI
;receive data buffer in this example
;Lets reserve 0x700-0x8FF for use as our SPI
;transmit data buffer in this example
;Get high byte of DestBuf address (0x05)
;Load upper four bits of the RXADDR register
;Get low byte of the DestBuf address (0x00)
;Load lower eight bits of the RXADDR register
;Get high byte of SrcBuf address (0x07)
;Load upper four bits of the TXADDR register
;Get low byte of the SrcBuf address (0x00)
;Load lower eight bits of the TXADDR register
;Lets move 0x200 (512) bytes in one DMA xfer
;Load the upper two bits of DMABC register
;Actual bytes transferred is (DMABC + 1), so
;we load 0x01FF into DMABC to xfer 0x200 bytes
;The SPI DMA module will now begin transferring
;the data taken from SrcBuf, and will store
;received bytes into DestBuf.
;CPU is now free to do whatever it wants to
;and the DMA operation will continue without
;intervention, until it completes.
;When the transfer is complete, the SSP2IF flag in
;the PIR3 register will become set, and the DMAEN bit
;is automatically cleared by the hardware.
;The DestBuf (0x500-0x7FF) will contain the received
;data.
;to reinitialize RXADDR, TXADDR, DMABC and then
;set the DMAEN bit.
To start another transfer, firmware will need
© 2009 Microchip Technology Inc.
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