PIC18F25J11-I/ML Microchip Technology, PIC18F25J11-I/ML Datasheet - Page 319
![IC PIC MCU FLASH 32K 2V 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F25J11-I/ML
Manufacturer Part Number
PIC18F25J11-I/ML
Description
IC PIC MCU FLASH 32K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18F25J11-I/ML
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F25J11-I/ML
Manufacturer:
MICROCHIP
Quantity:
4 000
- Current page: 319 of 528
- Download datasheet (8Mb)
TABLE 18-4:
© 2009 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
PIR3
PIE3
IPR3
TRISC
TRISB
SSP1BUF
SSPxADD
SSPxMSK
SSPxCON1
SSPxCON2
SSPxSTAT
SSP2BUF
SSP2ADD
Legend:
Note 1:
Name
2:
3:
(1)
— = unimplemented, read as ‘0’. Shaded cells are not used by the MSSPx module in I
SSPxMSK shares the same address in SFR space as SSPxADD, but is only accessible in certain I
operations in 7-Bit Masking mode. See Section 18.5.3.4 “7-Bit Address Masking Mode” for more details.
Alternate bit definitions for use in I
These bits are only available on 44-pin devices.
MSSP1 Address Register (I
MSSP1 Receive Buffer/Transmit Register
MSSP2 Receive Buffer/Transmit Register
MSSP2 Address Register (I
GIE/GIEH PEIE/GIEL
PMPIF
PMPIE
PMPIP
OSCFIF
OSCFIE
OSCFIP
SSP2IE
SSP2IP
TRISC7
TRISB7
SSP2IF
WCOL
GCEN
GCEN
MSK7
Bit 7
SMP
REGISTERS ASSOCIATED WITH I
(3)
(3)
(3)
ACKSTAT
ACKSTAT ADMSK5
TRISC6
TRISB6
SSPOV
BCL2IF
BCL2IE
BCL2IP
CM2IE
CM2IP
CM2IF
MSK6
ADIE
ADIP
Bit 6
ADIF
CKE
2
TMR0IE
TRISC5
TRISB5
SSPEN
ACKDT
2
CM1IF
CM1IE
CM1IP
RC2IF
RC2IE
RC2IP
RC1IF
RC1IE
RC1IP
C™ Slave mode), MSSP1 Baud Rate Reload Register (I
MSK5
C Slave mode), MSSP2 Baud Rate Reload Register (I
Bit 5
D/A
2
C Slave mode operations only.
(2)
ADMSK4
TRISC4
TRISB4
ACKEN
INT0IE
TX2IE
TX2IP
TX1IE
TX1IP
TX2IF
TX1IF
MSK4
Bit 4
CKP
—
—
—
P
2
(2)
C™ OPERATION
ADMSK3
PIC18F46J11 FAMILY
TMR4IE
TMR4IP
TMR4IF
SSP1IF
SSP1IE
SSP1IP
BCL1IE
BCL1IP
TRISC3
TRISB3
BCL1IF
SSPM3
RCEN
MSK3
RBIE
Bit 3
S
(2)
ADMSK2
CTMUIF
CTMUIE
CTMUIP
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISC2
TRISB2
SSPM2
LVDIE
LVDIP
LVDIF
MSK2
Bit 2
PEN
R/W
(2)
ADMSK1
TMR3GIE
TMR3GIP
TMR3GIF
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISC1
TRISB1
SSPM1
INT0IF
MSK1
RSEN
Bit 1
UA
2
2
C Master mode)
C Master mode)
2
(2)
C™ mode.
TMR1IE
TMR1IP
TMR1IF
CCP2IF
CCP2IE
CCP2IP
TRISC0
TRISB0
SSPM0
DS39932C-page 319
RTCIF
RTCIE
RTCIP
MSK0
RBIF
Bit 0
SEN
SEN
BF
2
C Slave mode
on Page:
Values
64, 67
64, 67
64, 67
Reset
64, 67
64, 67
63
65
65
65
65
65
65
65
65
65
66
66
64
67
67
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