DSPIC30F2012-30I/SP Microchip Technology, DSPIC30F2012-30I/SP Datasheet - Page 133

• Manufacturer Part Number: DSPIC30F2012-30I/SP
• Description: IC DSPIC MCU/DSP 12K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2012-30I/SP

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 12
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Core Frequency: 30MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F201230ISP

17.8
The Peripheral Module Disable (PMD) registers pro-
vide a method to disable a peripheral module by stop-
ping all clock sources supplied to that module. When a
peripheral is disabled via the appropriate PMD control
bit, the peripheral is in a minimum power consumption
state. The Control and Status registers associated with
the peripheral will also be disabled so writes to those
registers will have no effect and read values will be
invalid.
A peripheral module will only be enabled if both the
associated bit in the the PMD register is cleared and
the peripheral is supported by the specific dsPIC DSC
variant. If the peripheral is present in the device, it is
enabled in the PMD register by default.
© 2006 Microchip Technology Inc.
Note:
Note:
Peripheral Module Disable (PMD)
Registers
If a PMD bit is set, the corresponding mod-
ule is disabled after a delay of 1 instruction
cycle. Similarly, if a PMD bit is cleared, the
corresponding module is enabled after a
delay of 1 instruction cycle (assuming the
module Control registers are already
configured to enable module operation).
In the dsPIC30F2011, dsPIC30F3012 and
dsPIC30F2012 devices, the U2MD bit is
readable and writable and will be read as
‘1’ when set.
dsPIC30F2011/2012/3012/3013
17.9
When MPLAB
Circuit Debugging functionality is enabled. This func-
tion allows simple debugging functions when used with
MPLAB IDE. When the device has this feature enabled,
some of the resources are not available for general
use. These resources include the first 80 bytes of Data
RAM and two I/O pins.
One of four pairs of Debug I/O pins may be selected by
the user using configuration options in MPLAB IDE.
These pin pairs are named EMUD/EMUC, EMUD1/
EMUC1, EMUD2/EMUC2 and EMUD3/EMUC3.
In each case, the selected EMUD pin is the Emulation/
Debug Data line, and the EMUC pin is the Emulation/
Debug Clock line. These pins will interface to the
MPLAB ICD 2 module available from Microchip. The
selected pair of Debug I/O pins is used by MPLAB
ICD 2 to send commands and receive responses, as
well as to send and receive data. To use the In-Circuit
Debugger function of the device, the design must
implement ICSP connections to MCLR, V
PGC, PGD and the selected EMUDx/EMUCx pin pair.
This gives rise to two possibilities:
1.
2.
If EMUD/EMUC is selected as the Debug I/O pin
pair, then only a 5-pin interface is required, as
the EMUD and EMUC pin functions are multi-
plexed with the PGD and PGC pin functions in
all dsPIC30F devices.
If EMUD1/EMUC1, EMUD2/EMUC2 or EMUD3/
EMUC3 is selected as the Debug I/O pin pair,
then a 7-pin interface is required, as the
EMUDx/EMUCx pin functions (x = 1, 2 or 3) are
not multiplexed with the PGD and PGC pin
functions.
In-Circuit Debugger
®
ICD2 is selected as a Debugger, the In-
DS70139E-page 131
DD
, V
SS
,