DSPIC30F2012-30I/SP Microchip Technology, DSPIC30F2012-30I/SP Datasheet - Page 63

IC DSPIC MCU/DSP 12K 28DIP

DSPIC30F2012-30I/SP

Manufacturer Part Number
DSPIC30F2012-30I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2012-30I/SP

Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
12
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F201230ISP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2012-30I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
7.3
The input change notification module provides the
dsPIC30F devices the ability to generate interrupt
requests to the processor, in response to a change of
state on selected input pins. This module is capable of
detecting input change of states even in Sleep mode,
when the clocks are disabled. There are up to 10 exter-
nal signals (CN0 through CN7, CN17 and CN18) that
may be selected (enabled) for generating an interrupt
request on a change of state.
TABLE 7-7:
TABLE 7-8:
© 2006 Microchip Technology Inc.
Note: Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
CNEN1
CNEN2
CNPU1
CNPU2
CNEN1
CNEN2
CNPU1
CNPU2
Name
Name
SFR
SFR
Input Change Notification Module
Addr.
Addr.
00C0
00C2
00C4
00C6
00C0
00C2
00C4
00C6
INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F2011/3012 (BITS 7-0)
INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F2012/3013 (BITS 7-0)
CN7PUE
CN7PUE
CN7IE
CN7IE
Bit 7
Bit 7
CN6PUE
CN6PUE
CN6IE
CN6IE
Bit 6
Bit 6
CN5PUE
CN5PUE
dsPIC30F2011/2012/3012/3013
CN5IE
CN5IE
Bit 5
Bit 5
CN4PUE
CN4PUE
CN4IE
CN4IE
Bit 4
Bit 4
CN3PUE
CN3PUE
CN3IE
CN3IE
Bit 3
Bit 3
CN18PUE CN17PUE
CN2PUE
CN2PUE
CN18IE
CN2IE
CN2IE
Bit 2
Bit 2
CN1PUE
CN1PUE
CN17IE
CN1IE
CN1IE
Bit 1
Bit 1
CN0PUE
CN0PUE
CN0IE
CN0IE
Bit 0
Bit 0
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
DS70139E-page 61
Reset State
Reset State

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