DSPIC30F2012-30I/SP Microchip Technology, DSPIC30F2012-30I/SP Datasheet - Page 22

IC DSPIC MCU/DSP 12K 28DIP

DSPIC30F2012-30I/SP

Manufacturer Part Number
DSPIC30F2012-30I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2012-30I/SP

Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
12
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F201230ISP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2012-30I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
ds
2.3
The dsPIC DSC devices feature a 16/16-bit signed
fractional divide operation, as well as 32/16-bit and 16/
16-bit signed and unsigned integer divide operations, in
the form of single instruction iterative divides. The fol-
lowing instructions and data sizes are supported:
1.
2.
3.
4.
5.
The 16/16 divides are similar to the 32/16 (same number
of iterations), but the dividend is either zero-extended or
sign-extended during the first iteration.
TABLE 2-1:
DS70139E-page 20
DIVF
DIV.sd
DIV.s
DIV.ud
DIV.u
DIVF - 16/16 signed fractional divide
DIV.sd - 32/16 signed divide
DIV.ud - 32/16 unsigned divide
DIV.s - 16/16 signed divide
DIV.u - 16/16 unsigned divide
Instruction
PIC30F2011/2012/3012/3013
Divide Support
DIVIDE INSTRUCTIONS
Signed fractional divide: Wm/Wn
Signed divide: (Wm+1:Wm)/Wn
Signed divide: Wm/Wn
Unsigned divide: (Wm+1:Wm)/Wn
Unsigned divide: Wm/Wn
W0; Rem
W0; Rem
W0; Rem
W0; Rem
W0; Rem
W1
W1
The divide instructions must be executed within a
REPEAT loop. Any other form of execution (e.g., a
series of discrete divide instructions) will not function
correctly because the instruction flow depends on
RCOUNT. The divide instruction does not automatically
set up the RCOUNT value and it must, therefore, be
explicitly and correctly specified in the REPEAT instruc-
tion, as shown in Table 2-1 (REPEAT executes the tar-
get instruction {operand value+1} times). The REPEAT
loop count must be setup for 18 iterations of the DIV/
DIVF instruction. Thus, a complete divide operation
requires 19 cycles.
Function
Note:
W1
W1
W1
The divide flow is interruptible. However,
the user needs to save the context as
appropriate.
© 2006 Microchip Technology Inc.

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