PIC18F27J53-I/SP Microchip Technology, PIC18F27J53-I/SP Datasheet - Page 293

• Manufacturer Part Number: PIC18F27J53-I/SP
• Description: IC PIC MCU 128KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: *
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Embedded Interface Type: I2C, SPI, USART
• Digital Ic Case Style: DIP
• Supply Voltage Range: 1.8V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.1.5
The source of the conversion clock is software
selectable via the ADCS bits of the ADCON2 register.
There are seven possible clock options:
• F
• F
• F
• F
• F
• F
• F
The time to complete one bit conversion is defined as
T
as shown in
For correct conversion, the appropriate T
must be met. See A/D conversion requirements in
Table 27-22
examples of appropriate ADC clock selections.
TABLE 17-1:
 2010 Microchip Technology Inc.
Legend: Shaded cells are outside of recommended range.
Note 1:
AD
ADC Clock Source
Note:
OSC
OSC
OSC
OSC
OSC
OSC
RC
. One full 10-bit conversion requires 11 T
(dedicated internal oscillator)
F
F
F
2:
3:
4:
/2
/4
/8
/16
/32
/64
F
F
F
OSC
OSC
OSC
OSC
OSC
OSC
F
ADC Clock Period (T
RC
The F
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
When the device frequency is greater than 1 MHz, the F
conversion will be performed during Sleep.
Unless using the F
system clock frequency will change the
ADC
adversely affect the ADC result.
CONVERSION CLOCK
/16
/32
/64
Figure
/2
/4
/8
for more information.
RC
ADC CLOCK PERIOD (T
clock
17-3.
source has a typical T
frequency,
ADCS<2:0>
RC
AD
000
100
001
101
010
110
x11
, any changes in the
)
Table 17-1
AD
which
specification
AD
AD
time of 1.7 s.
AD
periods
31.25 ns
may
gives
) V
1-4 s
62.5 ns
400 ns
250 ns
500 ns
64 MHz
Preliminary
1.0 s
S
. DEVICE OPERATING FREQUENCIES
(1,4)
AD
(2)
(2)
(2)
(2)
(2)
time.
17.1.6
The ADC module allows for the ability to generate an
interrupt upon completion of an Analog-to-Digital
Conversion. The ADC interrupt enable is the ADIE bit
in the PIE1 register and the interrupt priority is the ADIP
bit in the IPR1 register. The ADC interrupt flag is the
ADIF bit in the PIR1 register. The ADIF bit must be
cleared by software.
This interrupt can be generated while the device is
operating or while in Sleep. If the device is in Sleep, the
interrupt will wake-up the device. Upon waking from
Sleep, the next instruction following the SLEEP
instruction is always executed. If the user is attempting
to wake-up from Sleep and resume in-line code
execution, the global interrupt must be disabled. If the
global interrupt is enabled, execution will switch to the
Interrupt Service Routine.
Note:
PIC18(L)F2X/4XK22
1-4 s
RC
125 ns
250 ns
500 ns
Device Frequency (F
4.0 s
16 MHz
1.0 s
2.0 s
clock source is only recommended if the
(1,4)
(3)
(2)
(2)
(2)
INTERRUPTS
The ADIF bit is set at the completion of
every conversion, regardless of whether
or not the ADC interrupt is enabled.
1-4 s
16.0 s
500 ns
4.0 s
8.0 s
4 MHz
1.0 s
2.0 s
OSC
(1,4)
(3)
(3)
(2)
(3)
)
DS41412D-page 293
1-4 s
16.0 s
32.0 s
64.0 s
4.0 s
8.0 s
1 MHz
2.0 s
(1,4)
(3)
(3)
(3)
(3)
(3)