PIC18F27J53-I/SP Microchip Technology, PIC18F27J53-I/SP Datasheet - Page 459

• Manufacturer Part Number: PIC18F27J53-I/SP
• Description: IC PIC MCU 128KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: *
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Embedded Interface Type: I2C, SPI, USART
• Digital Ic Case Style: DIP
• Supply Voltage Range: 1.8V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 27-22: A/D CONVERSION REQUIREMENTS
 2010 Microchip Technology Inc.
130
131
132
135
136
Legend: TBD = To Be Determined
Note 1:
Param.
No.
2:
3:
4:
T
T
T
T
T
Symbol
AD
CNV
ACQ
SWC
DIS
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
A/D Clock Period
Conversion Time
(not including acquisition time) (Note 2)
Acquisition Time (Note 3)
Switching Time from Convert  Sample
Discharge Time
Characteristic
DD
to V
SS
or V
SS
Preliminary
to V
DD
). The source impedance (R
CY
cycle.
Min
0.7
0.7
1.0
1.4
12
—
PIC18(L)F2X/4XK22
2
(Note 4)
25.0
4.0
Max
4.0
12
—
2
(1)
(1)
Units
T
T
s
s
s
s
S
AD
AD
) on the input channels is 50 .
T
-40C to +85C
T
+85C to +125C
FRC mode, V
V
OSC
OSC
AD
DD
clock divider.
= 3V, Rs = 50
based,
based,
Conditions
DS41412D-page 459
DD
2.0V