ATMEGA32-16PU Atmel, ATMEGA32-16PU Datasheet - Page 114

• Manufacturer Part Number: ATMEGA32-16PU
• Description: IC AVR MCU 32K 16MHZ 5V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32-16PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 16 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 32
• Interface: 2-Wire/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 4.5-5.5 V
• Data Rom Size: 1024 B
• Height: 4.83 mm
• Length: 52.58 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Width: 13.97 mm
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 2KB
• Rohs Compliant: Yes
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Output Compare Unit
114
ATmega32(L)
Depending on the mode of operation used, the counter is cleared, incremented, or dec-
remented at each timer clock (clk
clock source, selected by the Clock Select bits (CS22:0). When no clock source is
selected (CS22:0 = 0) the timer is stopped. However, the TCNT2 value can be accessed
by the CPU, regardless of whether clk
priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits
located in the Timer/Counter Control Register (TCCR2). There are close connections
between how the counter behaves (counts) and how waveforms are generated on the
Output Compare output OC2. For more details about advanced counting sequences
and waveform generation, see “Modes of Operation” on page 116.
The Timer/Counter Overflow (TOV2) Flag is set according to the mode of operation
selected by the WGM21:0 bits.
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2). Whenever TCNT2 equals OCR2, the comparator signals a match. A match will
set the Output Compare Flag (OCF2) at the next timer clock cycle. If enabled (OCIE2 =
1), the Output Compare Flag generates an output compare interrupt. The OCF2 Flag is
automatically cleared when the interrupt is executed. Alternatively, the OCF2 Flag can
be cleared by software by writing a logical one to its I/O bit location. The waveform gen-
erator uses the match signal to generate an output according to operating mode set by
the WGM21:0 bits and Compare Output mode (COM21:0) bits. The max and bottom sig-
nals are used by the waveform generator for handling the special cases of the extreme
values in some modes of operation (“Modes of Operation” on page 116). Figure 55
shows a block diagram of the output compare unit.
Figure 55. Output Compare Unit, Block Diagram
top
bottom
bottom
FOCn
top
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
OCRn
Waveform Generator
WGMn1:0
TOV2
=
T2
(8-bit Comparator )
DATA BUS
). clk
can be used for generating a CPU interrupt.
T2
T2
COMn1:0
is present or not. A CPU write overrides (has
can be generated from an external or internal
TCNTn
OCFn (Int.Req.)
OCxy
2503G–AVR–11/04