ATMEGA32-16PU Atmel, ATMEGA32-16PU Datasheet - Page 221

• Manufacturer Part Number: ATMEGA32-16PU
• Description: IC AVR MCU 32K 16MHZ 5V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32-16PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 16 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 32
• Interface: 2-Wire/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 4.5-5.5 V
• Data Rom Size: 1024 B
• Height: 4.83 mm
• Length: 52.58 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Width: 13.97 mm
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 2KB
• Rohs Compliant: Yes
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

On-chip Debug Specific
JTAG Instructions
PRIVATE0; $8
PRIVATE1; $9
PRIVATE2; $A
PRIVATE3; $B
2503G–AVR–11/04
•
•
A debugger, like the AVR Studio, may however use one or more of these resources for
its internal purpose, leaving less flexibility to the end-user.
A list of the On-chip Debug specific JTAG instructions is given in “On-chip Debug Spe-
cific JTAG Instructions” on page 221.
The JTAGEN Fuse must be programmed to enable the JTAG Test Access Port. In addi-
tion, the OCDEN Fuse must be programmed and no Lock bits must be set for the On-
chip Debug system to work. As a security feature, the On-chip Debug system is disabled
when any Lock bits are set. Otherwise, the On-chip Debug system would have provided
a back-door into a secured device.
The AVR JTAG ICE from Atmel is a powerful development tool for On-chip Debugging
of all AVR 8-bit RISC Microcontrollers with IEEE 1149.1 compliant JTAG interface. The
JTAG ICE and the AVR Studio user interface give the user complete control of the inter-
nal resources of the microcontroller, helping to reduce development time by making
debugging easier. The JTAG ICE performs real-time emulation of the micrcontroller
while it is running in a target system.
Please refer to the Support Tools section on the AVR pages on www.atmel.com for a full
description of the AVR JTEG ICE. AVR Studio can be downloaded free from Software
section on the same web site.
All necessary execution commands are available in AVR Studio, both on source level
and on disassembly level. The user can execute the program, single step through the
code either by tracing into or stepping over functions, step out of functions, place the
cursor on a statement and execute until the statement is reached, stop the execution,
and reset the execution target. In addition, the user can have an unlimited number of
code breakpoints (using the BREAK instruction) and up to two data memory break-
points, alternatively combined as a mask (range) Break Point.
The On-chip Debug support is considered being private JTAG instructions, and distrib-
uted within ATMEL and to selected third party vendors only. Instruction opcodes are
listed for reference.
Private JTAG instruction for accessing On-chip Debug system.
Private JTAG instruction for accessing On-chip Debug system.
Private JTAG instruction for accessing On-chip Debug system.
Private JTAG instruction for accessing On-chip Debug system.
2 single Program Memory Break Points + 1 Program Memory Break Point with mask
(“range Break Point”)
2 single Program Memory Break Points + 1 Data Memory Break Point with mask
(“range Break Point”)
ATmega32(L)
221