ATMEGA32-16PU Atmel, ATMEGA32-16PU Datasheet - Page 178

IC AVR MCU 32K 16MHZ 5V 40DIP

ATMEGA32-16PU

Manufacturer Part Number
ATMEGA32-16PU
Description
IC AVR MCU 32K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
32
Interface
2-Wire/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Data Rom Size
1024 B
Height
4.83 mm
Length
52.58 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
13.97 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1024Byte
Ram Memory Size
2KB
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32-16PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Using the TWI
Figure 85. Interfacing the Application to the TWI in a Typical Transmission
178
Application
Hardware
Action
Action
TWI
TWI bus
ATmega32(L)
writes to TWCR
transmission of
1. Application
START condition sent
Status code indicates
to initiate
START
2. TWINT set.
START
TWDR, and loads appropriate control
3. Check TWSR to see if START was
signals into TWCR, making sure that
TWINT is written to one, and TWSTA
sendt. Application loads SLA+W into
• Bit 0 – TWGCE: TWI General Call Recognition Enable Bit
If set, this bit enables the recognition of a General Call given over the Two-wire Serial
Bus.
The AVR TWI is byte-oriented and interrupt based. Interrupts are issued after all bus
events, like reception of a byte or transmission of a START condition. Because the TWI
is interrupt-based, the application software is free to carry on other operations during a
TWI byte transfer. Note that the TWI Interrupt Enable (TWIE) bit in TWCR together with
the Global Interrupt Enable bit in SREG allow the application to decide whether or not
assertion of the TWINT Flag should generate an interrupt request. If the TWIE bit is
cleared, the application must poll the TWINT Flag in order to detect actions on the TWI
bus.
When the TWINT Flag is asserted, the TWI has finished an operation and awaits appli-
cation response. In this case, the TWI Status Register (TWSR) contains a value
indicating the current state of the TWI bus. The application software can then decide
how the TWI should behave in the next TWI bus cycle by manipulating the TWCR and
TWDR Registers.
Figure 85 is a simple example of how the application can interface to the TWI hardware.
In this example, a master wishes to transmit a single data byte to a slave. This descrip-
tion is quite abstract, a more detailed explanation follows later in this section. A simple
code example implementing the desired behaviour is also presented.
1. The first step in a TWI transmission is to transmit a START condition. This is
2. When the START condition has been transmitted, the TWINT Flag in TWCR is
is written to zero
done by writing a specific value into TWCR, instructing the TWI hardware to
transmit a START condition. Which value to write is described later on. However,
it is important that the TWINT bit is set in the value written. Writing a one to
TWINT clears the Flag. The TWI will not start any operation as long as the
TWINT bit in TWCR is set. Immediately after the application has cleared TWINT,
the TWI will initiate transmission of the START condition.
set, and TWSR is updated with a status code indicating that the START condition
has successfully been sent.
SLA+W
Status code indicates
SLA+W sent, ACK
4. TWINT set.
received
A
Application loads data into TWDR, and
5. Check TWSR to see if SLA+W was
loads appropriate control signals into
TWCR, making sure that TWINT is
sent and ACK received.
written to one
Data
data sent, ACK received
Status code indicates
6. TWINT set.
A
making sure that TWINT is written to one
7. Check TWSR to see if data was sent
Application loads appropriate control
signals to send STOP into TWCR,
STOP
and ACK received.
TWINT set
Indicates
2503G–AVR–11/04

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