AT90USB646-MU Atmel, AT90USB646-MU Datasheet - Page 257

IC AVR MCU 64K 64QFN

AT90USB646-MU

Manufacturer Part Number
AT90USB646-MU
Description
IC AVR MCU 64K 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet

Specifications of AT90USB646-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
90USB
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, TWI, USART, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Cpu Family
AT90
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
4KB
# I/os (max)
48
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
QFN EP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT90USB646-16MU
AT90USB646-16MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90USB646-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
21.6.2
21.7
7593K–AVR–11/09
Memory management
Host mode
EPEN=1
ALLOC=1
When the USB interface is configured in host mode, internal Pull Down resistors are activated on
both UDP UDM lines and the interface detects the type of connected device.
The controller does only support the following memory allocation management.
The reservation of a Pipe or an Endpoint can only be made in the increasing order (Pipe/End-
point 0 to the last Pipe/Endpoint). The firmware shall thus configure them in the same order.
The reservation of a Pipe or an Endpoint “k
ware allocates the memory and inserts it between the Pipe/Endpoints “k
Pipe/Endpoint memory “slides” up and its data is lost. Note that the “k
point memory does not slide.
Clearing a Pipe enable (PEN) or an Endpoint enable (EPEN) does not clear either its ALLOC bit,
or its configuration (EPSIZE/PSIZE, EPBK/PBK). To free its memory, the firmware should clear
ALLOC. Then, the “k
and upper Pipe/Endpoint memory does not slide.
The following figure illustrates the allocation and reorganization of the USB memory in a typical
example:
Table 21-1.
Pipe/Endpoints
• First, Pipe/Endpoint 0 to Pipe/Endpoint 5 are configured, in the growing order. The memory
• Then, the Pipe/Endpoint 3 is disabled (EPEN=0), but its memory reservation is internally kept
• Its ALLOC bit is cleared: the Pipe/Endpoint 4 “slides” down, but the Pipe/Endpoint 5 does not
• Finally, if the firmware chooses to reconfigure the Pipe/Endpoint 3, with a bigger size. The
Free memory
of each is reserved in the DPRAM.
by the controller.
“slide”.
controller reserved the memory after the endpoint 2 memory and automatically “slide” the
Pipe/Endpoint 4. The Pipe/Endpoint 5 does not move and a memory conflict appear, in that
activation
5
4
3
2
1
0
Allocation and reorganization USB memory flow
i+1
” Pipe/Endpoint memory automatically “slides” down. Note that the “k
Pipe/Endpoint
Free memory
(ALLOC=1)
Disable
EPEN=0
5
4
2
1
0
i
” is done when its ALLOC bit is set. Then, the hard-
Free its memory
Free memory
Lost memory
(ALLOC=0)
5
4
2
1
0
AT90USB64/128
3 (bigger size)
Pipe/Endpoint
Free memory
Activatation
i+2
i-1
” and upper Pipe/End-
4
” and “k
2
1
0
5
i+1
”. The “k
Conflict
257
i+1
i+2

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