AT90USB646-MU Atmel, AT90USB646-MU Datasheet - Page 52
![IC AVR MCU 64K 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT90USB646-MU
Manufacturer Part Number
AT90USB646-MU
Description
IC AVR MCU 64K 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet
1.AT90USB646-MU.pdf
(461 pages)
Specifications of AT90USB646-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
90USB
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, TWI, USART, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Cpu Family
AT90
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
4KB
# I/os (max)
48
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
QFN EP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT90USB646-16MU
AT90USB646-16MU
AT90USB646-16MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90USB646-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 52 of 461
- Download datasheet (5Mb)
7.1
7.2
7.3
7.4
52
Idle Mode
ADC Noise Reduction Mode
Power-down Mode
Power-save Mode
AT90USB64/128
When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle
mode, stopping the CPU but allowing the USB, SPI, USART, Analog Comparator, ADC, 2-wire
Serial Interface, Timer/Counters, Watchdog, and the interrupt system to continue operating. This
sleep mode basically halts clk
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
ones like the Timer Overflow and USART Transmit Complete interrupts. If wake-up from the
Analog Comparator interrupt is not required, the Analog Comparator can be powered down by
setting the ACD bit in the Analog Comparator Control and Status Register – ACSR. This will
reduce power consumption in Idle mode. If the ADC is enabled, a conversion starts automati-
cally when this mode is entered.
When the SM2..0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC
Noise Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, 2-wire
Serial Interface address match, Timer/Counter2 and the Watchdog to continue operating (if
enabled). This sleep mode basically halts clkI/O, clkCPU, and clkFLASH, while allowing the
other clocks to run (including clkUSB).
This improves the noise environment for the ADC, enabling higher resolution measurements. If
the ADC is enabled, a conversion starts automatically when this mode is entered. Apart form the
ADC Conversion Complete interrupt, only an External Reset, a Watchdog System Reset, a
Watchdog interrupt, a Brown-out Reset, a 2-wire serial interface interrupt, a Timer/Counter2
interrupt, an SPM/EEPROM ready interrupt, an external level interrupt on INT7:4 or a pin
change interrupt can wakeup the MCU from ADC Noise Reduction mode.
When the SM2..0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the external Oscillator is stopped, while the external interrupts, the 2-
wire Serial Interface, and the Watchdog continue operating (if enabled). Only an External Reset,
a Watchdog Reset, a Brown-out Reset, 2-wire Serial Interface address match, an external level
interrupt on INT7:4, an external interrupt on INT3:0, a pin change interrupt or an asynchronous
USB interrupt sources (VBUSTI, WAKEUPI, IDTI and HWUPI), can wake up the MCU. This
sleep mode basically halts all generated clocks, allowing operation of asynchronous modules
only.
Note that if a level triggered interrupt is used for wake-up from Power-down mode, the changed
level must be held for some time to wake up the MCU. Refer to
for details.
When waking up from Power-down mode, there is a delay from the wake-up condition occurs
until the wake-up becomes effective. This allows the clock to restart and become stable after
having been stopped. The wake-up period is defined by the same CKSEL Fuses that define the
Reset Time-out period, as described in
When the SM2..0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-
save mode. This mode is identical to Power-down, with one exception:
CPU
and clk
“Clock Sources” on page
FLASH
, while allowing the other clocks to run.
“External Interrupts” on page 94
40.
7593K–AVR–11/09
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