AT90USB646-MU Atmel, AT90USB646-MU Datasheet - Page 288

IC AVR MCU 64K 64QFN

AT90USB646-MU

Manufacturer Part Number
AT90USB646-MU
Description
IC AVR MCU 64K 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet

Specifications of AT90USB646-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
90USB
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, TWI, USART, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Cpu Family
AT90
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
4KB
# I/os (max)
48
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
QFN EP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT90USB646-16MU
AT90USB646-16MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90USB646-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
288
AT90USB64/128
This bit is inactive (cleared) if the endpoint is an OUT endpoint.
• 7 - FLERRE - Flow Error Interrupt Enable Flag
Set to enable an endpoint interrupt (EPINTx) when OVERFI or UNDERFI are sent.
Clear to disable an endpoint interrupt (EPINTx) when OVERFI or UNDERFI are sent.
• 6 - NAKINE - NAK IN Interrupt Enable Bit
Set to enable an endpoint interrupt (EPINTx) when NAKINI is set.
Clear to disable an endpoint interrupt (EPINTx) when NAKINI is set.
• 5 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 4 - NAKOUTE - NAK OUT Interrupt Enable Bit
Set to enable an endpoint interrupt (EPINTx) when NAKOUTI is set.
Clear to disable an endpoint interrupt (EPINTx) when NAKOUTI is set.
• 3 - RXSTPE - Received SETUP Interrupt Enable Flag
Set to enable an endpoint interrupt (EPINTx) when RXSTPI is sent.
Clear to disable an endpoint interrupt (EPINTx) when RXSTPI is sent.
• 2 - RXOUTE - Received OUT Data Interrupt Enable Flag
Set to enable an endpoint interrupt (EPINTx) when RXOUTI is sent.
Clear to disable an endpoint interrupt (EPINTx) when RXOUTI is sent.
• 1 - STALLEDE - Stalled Interrupt Enable Flag
Set to enable an endpoint interrupt (EPINTx) when STALLEDI is sent.
Clear to disable an endpoint interrupt (EPINTx) when STALLEDI is sent.
• 0 - TXINE - Transmitter Ready Interrupt Enable Flag
Set to enable an endpoint interrupt (EPINTx) when TXINI is sent.
Clear to disable an endpoint interrupt (EPINTx) when TXINI is sent.
• 7-0 - DAT7:0 -Data Bits
Set by the software to read/write a byte from/to the endpoint FIFO selected by EPNUM.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
FLERRE
DAT D7
R/W
R/W
7
0
7
0
NAKINE
DAT D6
R/W
R/W
6
0
6
0
DAT D5
R
5
0
-
R/W
5
0
NAKOUTE
DAT D4
R/W
4
0
R/W
4
0
RXSTPE
DAT D3
R/W
R/W
3
0
3
0
RXOUTE
DAT D2
R/W
R/W
2
0
2
0
STALLEDE
DAT D1
R/W
R/W
1
0
1
0
DAT D0
R/W
TXINE
7593K–AVR–11/09
0
0
R/W
0
0
UEDATX
UEIENX

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