P89V52X2FA,512 NXP Semiconductors, P89V52X2FA,512 Datasheet - Page 7

• Manufacturer Part Number: P89V52X2FA,512
• Description: IC 80C51 MCU FLASH 8K 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V52X2FA,512

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 44-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: POR
• Number Of I /o: 32
• Eeprom Size: 192 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM11011 - BOARD FOR P89V52X2 44-TQFP622-1017 - BOARD 44-ZIF PLCC SOCKET622-1012 - BOARD FOR P89V52X2 44-TQFP622-1008 - BOARD FOR LPC9103 10-HVSON622-1002 - USB IN-CIRCUIT PROG LPC9XX
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4249-5; 935282528512; P89V52X2FA

NXP Semiconductors
Table 2.
[1]
[2]
P89V52X2_3
Product data sheet
Symbol
P3[5]/T1
P3[6]/WR
P3[7]/RD
PSEN
RST
EA
ALE
XTAL1
XTAL2
V
V
DD
SS
ALE loading issue: When ALE pin experiences higher loading (> 30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor of 3 k to 50 k to V
For 6-clock mode, ALE is emitted at
Pin description
Pin
DIP40
15
16
17
29
9
31
30
19
18
40
20
…continued
LQFP44
11
12
13
26
4
29
27
15
14
38
16
1
3
of crystal frequency.
PLCC44
17
18
19
32
10
35
33
21
20
44
22
Rev. 03 — 4 May 2009
Type
I/O
I
O
O
O
O
I/O
I
I
I/O
I
O
I
I
Description
P3[5] — Port 3 bit 5.
T1 — External count input to Timer/Counter 1
P3[6] — Port 3 bit 6.
WR — External data memory write strobe
P3[7] — Port 3 bit 7.
RD — External data memory read strobe.
Program Store Enable: PSEN is the read strobe for
external program memory. When the device is executing
from internal program memory, PSEN is inactive (HIGH).
When the device is executing code from external program
memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each
access to external data memory.
Reset: While the oscillator is running, a HIGH logic state
on this pin for two machine cycles will reset the device.
External Access Enable: EA must be connected to V
order to enable the device to fetch code from the external
program memory. EA must be strapped to V
program execution.
Address Latch Enable: ALE is the output signal for
latching the low byte of the address during an access to
external memory. Normally the ALE
constant rate of
used for external timing and clocking. One ALE pulse is
skipped during each access to external data memory.
However, if AO is set to ‘1’, ALE is disabled.
Crystal 1: Input to the inverting oscillator amplifier and
input to the internal clock generator circuits.
Crystal 2: Output from the inverting oscillator amplifier.
Power supply
Ground
80C51 with 256 B RAM, 192 B data EEPROM
1
6
the crystal frequency
DD
, e.g., for ALE pin.
P89V52X2
[1]
is emitted at a
© NXP B.V. 2009. All rights reserved.
[2]
and can be
DD
for internal
7 of 57
SS
in