LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 141

• Manufacturer Part Number: LPC1313FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1313FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 42
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Number Of Programmable I/os: 42
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4914; 935289651151

NXP Semiconductors
UM10375
User manual
9.11.4 Read Interrupt Status (Command: 0xF4, Data: read 2 bytes)
9.11.5 Read Current Frame Number (Command: 0xF5, Data: read 1 or 2
Table 171. Set Mode command description
Table 172. Read interrupt Status byte 1 command description
Table 173. Read interrupt Status byte 2 command description
The device status change is cleared by issuing the Get device status command. All other
endpoint interrupts are cleared by issuing select endpoint/clear interrupt command.
bytes)
Returns the frame number of the last successfully received SOF. The frame number is
eleven bits wide. The frame number returns least significant byte first. In case the user is
only interested in the lower 8 bits of the frame number, only the first byte needs to be read.
Bit Symbol
2
3
4
7:5 -
Bit Symbol
0
1
2
3
4
7:5 -
Bit Symbol
1:0 -
2
7:3 -
•
In case no SOF was received by the device at the beginning of a frame, the frame
number returned is that of the last successfully received SOF.
INAK_CO
INAK_AI
INAK_AO
EP0
EP1
EP2
EP3
EP4
D_ST
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
0
1
0
1
-
Description
EP0 interrupt
EP1 interrupt
EP2 interrupt
EP3 interrupt
EP4 interrupt
reserved
Value Description
Interrupt on NAK for Control OUT endpoint.
Only successful transactions generate an interrupt.
Both successful and NAKed OUT transactions generate
interrupts.
Interrupt on NAK for Interrupt or bulk IN endpoint.
Only successful transactions generate an interrupt.
Both successful and NAKed IN transactions generate interrupts.
Interrupt on NAK for Interrupt or bulk OUT endpoints.
Only successful transactions generate an interrupt.
Both successful and NAKed OUT transactions generate
interrupts.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
reserved
Device Status change interrupt
reserved
Rev. 2 — 7 July 2010
Chapter 9: LPC13xx USB device controller
UM10375
© NXP B.V. 2010. All rights reserved.
Reset value
0
0
0
0
0
-
143 of 333
0
0
0
NA
0
Reset
value
Reset
value
-
-