LPC1313FBD48,151 NXP Semiconductors, LPC1313FBD48,151 Datasheet - Page 75
![IC MCU 32BIT 32KB FLASH 48LQFP](/photos/6/64/66484/568-48-lqfp_sot313-2_sml.jpg)
LPC1313FBD48,151
Manufacturer Part Number
LPC1313FBD48,151
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Specifications of LPC1313FBD48,151
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
42
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
OM11041
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1000
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
LPC1000
Maximum Speed
72 MHz
Number Of Programmable I/os
42
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4918 - KIT DEV FOR LPC1313622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4914
935289651151
935289651151
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
LPC1313FBD48,151
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Quantity:
1 560
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6.1 How to read this chapter
6.2 Introduction
6.3 General description
UM10375
User manual
The implementation of the I/O configuration registers varies for different LPC13xx parts
and packages. See
not used in all parts or packages.
Table 89.
The I/O configuration registers control the electrical characteristics of the pins. The
following characteristics are configurable:
The IOCON registers control the function (GPIO or peripheral function), the input mode,
and the hysteresis of all PIO pins. In addition, the I
different I
can be selected.
Part
LPC1311,
LPC1313
LPC1342,
LPC1343
•
•
•
•
•
UM10375
Chapter 6: LPC13xx I/O configuration
Rev. 2 — 7 July 2010
pin function
internal pull-up/pull-down or Repeater mode function
hysteresis
analog input or digital mode for pins hosting the ADC inputs
I
2
C mode for pins hosting the I
2
C-bus modes. If a pin is used as input pin for the ADC, an analog input mode
I/O register configuration (unused registers and functions)
All information provided in this document is subject to legal disclaimers.
USB specific functions/pins
USB function in IOCON_PIO0_1,
IOCON_PIO0_3, IOCON_PIO0_6 not
used. Corresponding register bits are
reserved.
IOCON_PIO3_4 and IOCON_PIO3_5
not used (pins used for USB_D+/−).
Table 89
Rev. 2 — 7 July 2010
and
Table 91
2
C-bus function
for IOCON registers and register bits which are
2
C-bus pins can be configured for
HVQFN33 package (reduced
pinout)
IOCON_PIO2_1 to IOCON_PIO2_11,
IOCON_PIO3_0, IOCON_PIO3_1,
IOCON_PIO3_3 not used.
IOCON_PIO2_1 to IOCON_PIO2_11,
IOCON_PIO3_0, IOCON_PIO3_1,
IOCON_PIO3_3 not used.
© NXP B.V. 2010. All rights reserved.
User manual
77 of 333
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