LPC2470FET208,551 NXP Semiconductors, LPC2470FET208,551 Datasheet - Page 64

IC ARM7 MCU LCD 208-TFBGA

LPC2470FET208,551

Manufacturer Part Number
LPC2470FET208,551
Description
IC ARM7 MCU LCD 208-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2470FET208,551

Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4362
935284071551
LPC2470FET208-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2470FET208,551
Manufacturer:
Exar
Quantity:
92
Part Number:
LPC2470FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2470
Product data sheet
Fig 16. Differential data-to-EOP transition skew and EOP width
Fig 17. MISO line set-up time in SSP Master mode
T
PERIOD
differential
data lines
MOSI
MISO
shifting edges
SCK
Fig 18. Signal timing
n × T
differential data to
crossover point
SE0/EOP skew
PERIOD
output signal (O)
input signal (I)
All information provided in this document is subject to legal disclaimers.
+ t
reference
FDEOP
clock
Rev. 3 — 14 February 2011
t
su(SPI_MISO)
t
d(XXX)
crossover point
extended
Flashless 16-bit/32-bit microcontroller
t
su(D)
t
t
h(XXX)
h(D)
sampling edges
source EOP width: t
receiver EOP width: t
002aad326
LPC2470
002aad636
© NXP B.V. 2011. All rights reserved.
FEOPT
002aab561
EOPR1
, t
EOPR2
64 of 89

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