P80C554SFBD,157 NXP Semiconductors, P80C554SFBD,157 Datasheet - Page 30

• Manufacturer Part Number: P80C554SFBD,157
• Description: IC 80C51 MCU 8BIT ROMLESS 64LQFP
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C554SFBD,157

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 8 MHz, 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-2086; 935268881157; P80C554SFBD

In all cases, if the enable bit is 0, then the interrupt is disabled, and if the enable bit is 1, then the interrupt is enabled.
Philips Semiconductors
2003 Jan 28
80C51 8-bit microcontroller – 6-clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I
high I/O, 64L LQFP
IEN1 (E8H)
IP0H (B7H)
IP0 (B8H)
BIT
IEN1.7
IEN1.6
IEN1.5
IEN1.4
IEN1.3
IEN1.2
IEN1.1
IEN1.0
BIT
IP0.7
IP0.6
IP0.5
IP0.4
IP0.3
IP0.2
IP0.1
IP0.0
BIT
IP0H.7
IP0H.6
IP0H.5
IP0H.4
IP0H.3
IP0H.2
IP0H.1
IP0H.0
(MSB)
(MSB)
(MSB)
ET2
7
7
–
7
–
ECM2
PADH
PAD
SYMBOL
ET2
ECM2
ECM1
ECM0
ECT3
ECT2
ECT1
ECT0
SYMBOL
–
PAD
PS1
PS0
PT1
PX1
PT0
PX0
SYMBOL
–
PADH
PS1H
PS0H
PT1H
PX1H
PT0H
PX0H
Figure 30. Interrupt Priority Register High (IP0H)
6
6
6
Figure 28. Interrupt Enable Register (IEN1)
Figure 29. Interrupt Priority Register (IP0)
ECM1
PS1H
PS1
5
5
5
FUNCTION
Enable Timer T2 overflow interrupt(s)
Enable T2 Comparator 2 interrupt
Enable T2 Comparator 1 interrupt
Enable T2 Comparator 0 interrupt
Enable T2 Capture register 3 interrupt
Enable T2 Capture register 2 interrupt
Enable T2 Capture register 1 interrupt
Enable T2 Capture register 0 interrupt
FUNCTION
Unused
ADC interrupt priority level
SIO1 (I
SIO0 (UART) interrupt priority level
Timer 1 interrupt priority level
External interrupt 1 priority level
Timer 0 interrupt priority level
External interrupt 0 priority level
FUNCTION
Unused
ADC interrupt priority level high
SIO1 (I
SIO0 (UART) interrupt priority level high
Timer 1 interrupt priority level high
External interrupt 1 priority level high
Timer 0 interrupt priority level high
External interrupt 0 priority level high
ECM0
PS0H
PS0
2
2
4
4
4
C) interrupt priority level
C) interrupt priority level high
2
C, PWM, capture/compare,
30
ECT3
PT1H
PT1
3
3
3
PX1H
ECT2
PX1
2
2
2
ECT1
PT0H
PT0
1
1
1
ECT0
(LSB)
(LSB)
PX0H
(LSB)
PX0
SU00755
SU00763
SU00983
0
0
0
80C554/87C554
Product data