P80C554SFBD,157 NXP Semiconductors, P80C554SFBD,157 Datasheet - Page 45

• Manufacturer Part Number: P80C554SFBD,157
• Description: IC 80C51 MCU 8BIT ROMLESS 64LQFP
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C554SFBD,157

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 8 MHz, 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-2086; 935268881157; P80C554SFBD

Philips Semiconductors
Table 7.
2003 Jan 28
STATUS
STATUS
(S1STA)
(S1STA)
80C51 8-bit microcontroller – 6-clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I
high I/O, 64L LQFP
CODE
08H
10H
38H
40H
48H
50H
58H
A START condition has
been transmitted
A repeated START
condition has been
transmitted
Arbitration lost in
NOT ACK bit
SLA+R has been
transmitted; ACK has
b
been received
SLA+R has been
t
transmitted; NOT ACK
has been received
Data byte has been
received; ACK has been
returned
Data byte has been
received; NOT ACK has
been returned
STATUS OF THE I
STATUS OF THE I
Master Receiver Mode
SIO1 HARDWARE
SIO1 HARDWARE
diti
i
itt d NOT ACK
BUS AND
d
d NOT ACK h
h
i
d
b
2
2
C
C
Load SLA+R
Load SLA+R or
Load SLA+W
No S1DAT action or
No S1DAT action
No S1DAT action or
no S1DAT action
No S1DAT action or
no S1DAT action or
no S1DAT action
Read data byte or
read data byte
Read data byte or
read data byte or
read data byte
TO/FROM S1DAT
TO/FROM S1DAT
APPLICATION SOFTWARE RESPONSE
STA
X
X
X
0
1
0
0
1
0
1
0
0
1
0
1
2
C, PWM, capture/compare,
45
STO
TO S1CON
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
X
X
X
X
X
0
1
X
X
X
0
1
X
X
X
SLA+R will be transmitted;
ACK bit will be received
As above
SLA+W will be transmitted;
SIO1 will be switched to MST/TRX mode
I
SIO1 will enter a slave mode
A START condition will be transmitted when the
bus becomes free
Data byte will be received;
NOT ACK bit will be returned
Data byte will be received;
ACK bit will be returned
Repeated START condition will be transmitted
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Data byte will be received;
NOT ACK bit will be returned
Data byte will be received;
ACK bit will be returned
Repeated START condition will be transmitted
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
NEXT ACTION TAKEN BY SIO1 HARDWARE
2
C bus will be released;
80C554/87C554
Product data