ST72F324BJ6T6 STMicroelectronics, ST72F324BJ6T6 Datasheet - Page 140

• Manufacturer Part Number: ST72F324BJ6T6
• Description: IC MCU 8BIT 32K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5590

Instruction set
11.1.7
11.2
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Table 79.
Relative mode (direct, indirect)
This addressing mode is used to modify the PC register value, by adding an 8-bit signed
offset to it.
Table 80.
The relative addressing mode consists of two submodes:
Relative (direct)
The offset follows the opcode.
Relative (indirect)
The offset is defined in the memory, the address of which follows the opcode.
Instruction groups
The ST 7 family devices use an Instruction Set consisting of 63 instructions. The instructions
may be subdivided into 13 main groups as illustrated in the following table:
Table 81.
Short only
JRxx
CALLR
Load and Transfer
Stack operation
Increment/Decrement INC
.
Available relative direct/indirect instructions
Group
Instructions supporting direct, indexed, indirect and indirect indexed
addressing modes
Relative direct and indirect instructions and functions
Instruction groups
Instructions
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA, RLC, RRC
SWAP
CALL, JP
LD
PUSH
Doc ID13466 Rev 4
CLR
POP
DEC
RSP
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit operations
Bit Test and Jump operations
Shift and Rotate operations
Swap nibbles
Call or Jump sub-routine
Conditional Jump
Call Relative
Instructions
Function
Function
ST72324B-Auto