C8051T606-ZM Silicon Laboratories Inc, C8051T606-ZM Datasheet - Page 186
![IC 8051 MCU 1.5K-EEPROM 10-QFN](/photos/12/15/121567/10-qfn_pkg_sml.jpg)
C8051T606-ZM
Manufacturer Part Number
C8051T606-ZM
Description
IC 8051 MCU 1.5K-EEPROM 10-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Specifications of C8051T606-ZM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
10-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
6
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T606DK
Minimum Operating Temperature
- 40 C
Eeprom Size
-
Data Converters
-
For Use With
336-1668 - CARD DAUGHTER QFN10 SOCKET336-1667 - CARD DAUGHTER MSOP SOCKET336-1666 - KIT DEVELOPMENT FOR C8051T606336-1404 - KIT DEV FOR C8051T60X MCU'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1663-2
C8051T606-ZMR
C8051T606-ZMR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T606-ZMR
Manufacturer:
STM
Quantity:
4 037
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C8051T600/1/2/3/4/5/6
D
Revision 0.5 to Revision 1.0
Updated packaging information to include JEDEC-standard drawings for package and land diagram.
Revision 1.0 to Revision 1.1
Added C8051T606 device information.
Revision 1.1 to Revision 1.2
186
OCUMENT
Updated electrical specification tables based on test, characterization, and qualification data.
Updated with new formatting standards.
Corrected minor typographical errors throughout document.
Updated wording from “OTP EPROM” to “EPROM” throughout document.
Added information on C2 EPSTAT Register.
Updated EPROM programming sequence.
Added Note about 100% Tin (Sn) lead finish to ordering information table.
Updated Table 8.4 on page 34.
C
HANGE
L
IST
Rev. 1.2
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