C8051T606-ZM Silicon Laboratories Inc, C8051T606-ZM Datasheet - Page 77
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C8051T606-ZM
Manufacturer Part Number
C8051T606-ZM
Description
IC 8051 MCU 1.5K-EEPROM 10-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Specifications of C8051T606-ZM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
10-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
6
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T606DK
Minimum Operating Temperature
- 40 C
Eeprom Size
-
Data Converters
-
For Use With
336-1668 - CARD DAUGHTER QFN10 SOCKET336-1667 - CARD DAUGHTER MSOP SOCKET336-1666 - KIT DEVELOPMENT FOR C8051T606336-1404 - KIT DEV FOR C8051T60X MCU'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1663-2
C8051T606-ZMR
C8051T606-ZMR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T606-ZMR
Manufacturer:
STM
Quantity:
4 037
16. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the C8051T600/1/2/3/4/5/6's resources and
peripherals. The CIP-51 controller core duplicates the SFRs found in a typical 8051 implementation as well
as implementing additional SFRs used to configure and access the sub-systems unique to the
C8051T600/1/2/3/4/5/6. This allows the addition of new functionality while retaining compatibility with the
MCS-51™ instruction set. Table 16.1 lists the SFRs implemented in the C8051T600/1/2/3/4/5/6 device
family.
The SFR registers are accessed any time the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the data sheet, as indicated in
Table 16.2, for a detailed description of each register.
F8
F0
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2
E0
D8 PCA0CN
D0
C8 TMR2CN
C0 SMB0CN
B8
B0
A8
A0
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
ACC
ADC0CF
ADC0CN
ADC0GTH
98
90
88
80
Register
CPT0CN
(bit addressable)
SCON0
TCON
PSW
ACC
0(8)
P0
IP
IE
B
Table 16.1. Special Function Register (SFR) Memory Map
OSCXCN
PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2
Address
REF0CN
SMB0CF
P0MDIN
SBUF0
PCA0L
TMOD
XBR0
0xBC
0xE0
0xE8
0xC4
1(9)
SP
Table 16.2. Special Function Registers
SMB0DAT ADC0GTL ADC0GTH ADC0LTL
TMR2RLL TMR2RLH
OSCICN
Accumulator
ADC0 Configuration
ADC0 Control
ADC0 Greater-Than Compare High
PCA0H
TOFFL
XBR1
DPL
2(A)
TL0
PCA0CPL0 PCA0CPH0
AMX0SL
OSCICL
TOFFH
XBR2
DPH
3(B)
TL1
Rev. 1.2
P0MDOUT
ADC0CF
IT01CF
TMR2L
Description
TH0
4(C)
C8051T600/1/2/3/4/5/6
CPT0MD
TMR2H
ADC0L
TH1
5(D)
ADC0LTH
CKCON
ADC0H
EIP1
EIE1
6(E)
REG0CN
RSTSRC
CPT0MX
PCON
7(F)
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