R5F21237DFP#U0 Renesas Electronics America, R5F21237DFP#U0 Datasheet - Page 234
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/18/121887/r5f21237dfp_u0_sml.jpg)
R5F21237DFP#U0
Manufacturer Part Number
R5F21237DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21237DFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.64
Timer RD Start Register
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
5.
Set the TRDSTR register using the MOV instruction (do not use the bit handling instruction). Refer to 14.3.12.1
TRDSTR Register of Notes on Timer RD.
When the CSEL0 bit is set to 1, w rite 0 to the TSTART0 bit.
When the CSEL1 bit is set to 1, w rite 0 to the TSTART1 bit.
When the CSEL0 bit is set to 0 and generating the compare match signal (TRDIOA0), this bit is set to 0 (count stops).
When the CSEL1 bit is set to 0 and generating the compare match signal (TRDIOA1), this bit is set to 0 (count stops).
b3 b2
b1 b0
TRDSTR Register in PWM Mode
Bit Symbol
TSTART0
TSTART1
(b7 - b4)
TRDSTR
Symbol
CSEL0
CSEL1
Page 212 of 501
(1)
—
TRD0 count start flag
TRD1 count start flag
TRD0 count operation select bit 0 : Count stops at the compare match
TRD1 count operation select bit 0 : Count stops at the compare match
Nothing is assigned. When w rite, set to 0.
When read, its content is 1.
Address
Bit Name
0137h
(4)
(5)
0 : Count stops
1 : Count starts
0 : Count stops
1 : Count starts
1 : Count continues at the compare
1 : Count continues at the compare
w ith the TRDGRA0 register
match w ith the TRDGRA0 register
w ith the TRDGRA1 register
match w ith the TRDGRA1 register
(2)
(3)
After Reset
11111100b
Function
14. Timers
RW
RW
RW
RW
RW
—
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